Two-Layer Encapsulant Structure for Power Semiconductor Heat Control

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Solution Overview

Problem

Power semiconductor module arrangements face issues with heat generation leading to thermal degradation of the encapsulant, resulting in reduced insulation properties and potential failure due to brittleness and delamination.

Innovation Solution

A power semiconductor module arrangement is designed with a liquid or gel-like first layer and a gel-like or solid second layer, where the first layer is between the substrate and the second layer, and the second layer is distant from the top of the housing, allowing for effective heat dissipation and preventing pressure buildup.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a single-layer encapsulant is used to cover semiconductor elements, then the structure is simple and manufacturing is easy, but heat dissipation is insufficient leading to hot spots and thermal degradation

Engineering Contradiction:
Improveheat dissipationVSAvoidencapsulant structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The encapsulant is divided into two distinct layers: a first encapsulant layer in direct contact with semiconductor elements for heat dissipation, and a second encapsulant layer covering the first layer for protection. This segmentation allows each layer to be optimized for its specific function, with the first layer focused on thermal management and the second layer on mechanical protection and insulation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first encapsulant layer is specifically designed with thermal management properties to be in direct contact with heat-generating semiconductor elements, while the second encapsulant layer provides different properties for overall protection. This local quality differentiation addresses the specific thermal needs at the semiconductor-encapsulant interface while maintaining overall structural integrity.

Inventive Principle:
Principle #3Local quality

2Temperature

If the encapsulant is placed in direct contact with semiconductor elements for heat dissipation, then heat transfer is improved, but thermal degradation and brittleness occur over time

Engineering Contradiction:
Improveheat transferVSAvoidencapsulant durability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The second encapsulant layer is placed over the first encapsulant layer to provide protective cushioning before thermal degradation can affect the semiconductor elements. This prior protection prevents environmental factors and mechanical stress from directly impacting the heat-generating components, thereby extending the operational life of the module.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The first encapsulant layer acts as an intermediary between the semiconductor elements and the external environment, facilitating heat transfer while the second encapsulant layer serves as a mediator providing mechanical protection and environmental sealing. This intermediary structure allows heat dissipation while protecting against degradation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If the encapsulant completely fills the housing for maximum protection, then mechanical protection is maximized, but pressure buildup occurs during operation

Engineering Contradiction:
Improvemechanical protectionVSAvoidinternal pressure
Core Design Contradiction:
StrengthVSStress or pressure

Solution Approach 1:

The encapsulant layers are designed with specific volume ratios and physical properties that allow for thermal expansion and pressure equalization during operation. The two-layer configuration with the first layer in direct contact and the second layer providing coverage creates a structure that can accommodate pressure changes while maintaining mechanical protection.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces the formation of hot spots and prevents thermal degradation of the encapsulant, thereby increasing the reliability and longevity of the power semiconductor module arrangement.

Implementation Method 1

Heat that is generated during the operation of the power semiconductor module arrangement is mostly dissipated from the controllable semiconductor elements to the substrate and further through an optional base plate to a heat sink. However, the encapsulant which is in direct contact with the controllable semiconductor elements may also get heated and local hot spots may occur.

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The first layer is a liquid or gel-like layer... the first layer is arranged between the substrate and the second layer

Methodology Applied
Scientific EffectConvection: Convection

Implementation Method 3

the second layer is a gel-like or solid layer... the second layer is arranged distant from a top of the housing

Methodology Applied
Scientific EffectElasticity: Elasticity

Implementation Method 4

filling a first material having a first density in a housing... filling a second material having a second density in the housing, wherein the first density is higher than the second density, thereby forming a liquid first layer consisting of the first material and a liquid or gel-like pre-layer consisting of the second material

Methodology Applied
Scientific EffectDensity gradient: Density Gradient

Data Source

PatentEP4510181A1Power semiconductor module arrangement and method for producing the same
Publication Date: 2025.02.19 INFINEON TECHNOLOGIES AG
  • EP4510181A1 patent drawingFigure 1~2
  • EP4510181A1 patent drawingFigure 3~4
  • EP4510181A1 patent drawingFigure 5~6

AI summary

A power semiconductor module arrangement (100) comprises a substrate (10) arranged in or forming a ground surface of a housing (7), the housing (7) comprising sidewalls, at least one semiconductor body (20) arranged on the substrate (10), a first layer (50) partly filling the housing (7) and completely covering the substrate (10) and the at least one semiconductor body (20) arranged thereon, and a second layer (52) arranged adjacent to the first layer (50), wherein the first layer (50) is a liquid or gel-like layer, the second layer (52) is a solid layer, the first layer (50) is arranged between the substrate (10) and the second layer (52), and the second layer (52) is arranged distant from a top of the housing (7).