Power Semiconductor Devices With Integrated Bootstrap Diode

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Solution Overview

Problem

High-voltage integrated circuits face limitations due to low breakdown voltage and high on-resistance in laterally diffused MOS transistors, and the integration of bootstrap diodes outside the circuit increases module size, making it difficult to achieve compact and efficient power semiconductor devices.

Innovation Solution

A power semiconductor device is designed with a diode part and a junction field effect transistor (JFET) part on a substrate, featuring a p-type body region, n-type well, and n-type semiconductor regions with specific impurity concentrations and structures to form a p-n junction diode with high breakdown voltage and low on-resistance, along with a bootstrap circuit for efficient power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LDMOS transistors are used as level shift elements in high-voltage integrated circuits, then signal level shifting between low-voltage and high-voltage units is achieved, but the breakdown voltage is low and the on-resistance is high

Engineering Contradiction:
Improvebreakdown voltageVSAvoidon-resistance
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the electrical parameters of the semiconductor structure by creating a multi-region doping profile with varying impurity concentrations. The p-type body region has a first impurity concentration, the n-type well has a second impurity concentration, and the first n-type semiconductor region has a third impurity concentration, where these concentrations are specifically optimized to achieve both high breakdown voltage and low on-resistance simultaneously

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite semiconductor structure combining multiple doped regions with different electrical characteristics. The structure integrates p-type body region, n-type well, and first n-type semiconductor region to create a composite device that exhibits both high breakdown voltage and low on-resistance properties that cannot be achieved with single-material LDMOS transistors

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If bootstrap diodes are connected outside the high-voltage integrated circuit, then the circuit functionality is achieved, but the module size increases and integration becomes difficult

Engineering Contradiction:
Improvecircuit functionalityVSAvoidmodule size
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the bootstrap diode function with the existing semiconductor structure by forming the diode within the integrated circuit chip using the p-type body region, n-type well, and first n-type semiconductor region. This combines multiple functions (level shifting, high-voltage switching, and bootstrap operation) into a single integrated device, eliminating the need for external bootstrap diodes and reducing module size

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a multi-functional semiconductor device where the same structure serves multiple purposes: the p-type body region and n-type well form a diode for bootstrap operation, while the overall structure also provides high-voltage switching and level-shifting capabilities. This universal structure eliminates the need for separate dedicated components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11183495B2Power semiconductor devices
Publication Date: 2021.11.23 SEMICON COMPONENTS IND LLC
  • US11183495B2 patent drawing
  • US11183495B2 patent drawing
  • US11183495B2 patent drawing

AI summary

A power semiconductor device includes a diode part disposed in a first region of a substrate, a junction field effect transistor (JFET) part disposed in a second region adjacent to the first region of the substrate, an anode terminal disposed on the first region of the substrate, and a cathode terminal disposed on the second region of the substrate.