Power Semiconductor Capacitance Profile for Turn-Off Surge Control
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Solution Overview
Problem
Existing semiconductor devices experience increased physical size and complexity due to the need for external capacitors and capacitance adjustment elements to manage surge voltages during turn-off, leading to higher turn-off losses and surge voltages.
Innovation Solution
A semiconductor device with a semiconductor element configured to form an upper-lower arm circuit, featuring a control electrode, high-potential electrode, and low-potential electrode, where the parasitic capacitance between the control and high-potential electrodes changes based on potential difference, with specific capacitance values defined at different voltage ranges to reduce turn-off loss and surge voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external capacitors and capacitance adjustment elements are added to manage surge voltages, then surge voltage control is improved, but device physical size and structural complexity increase
Solution Approach 1:
The patent combines the surge voltage management function with the existing parasitic capacitance structure of the semiconductor element itself. By utilizing the inherent capacitance between the control electrode and high-potential electrode, and adjusting its characteristics through potential difference, the invention eliminates the need for separate external capacitors and capacitance adjustment elements, thereby reducing structural complexity while maintaining surge voltage control capability
Solution Approach 2:
The semiconductor element uses its own internal parasitic capacitance characteristics to manage surge voltages. The capacitance value changes automatically based on the potential difference between electrodes, providing self-regulating surge voltage control without requiring external control circuits or additional components
2Reliability
If external capacitors and capacitance adjustment elements are added to manage surge voltages, then surge voltage control is improved, but physical size increases
Solution Approach 1:
The invention merges the surge voltage management function into the existing semiconductor element structure by utilizing the parasitic capacitance between internal electrodes. This integration eliminates the need for separate external capacitor components and their associated mounting space, thereby reducing the overall physical size of the device while maintaining effective surge voltage control
Solution Approach 2:
The invention extracts the surge voltage management function from external components and relocates it to the internal parasitic capacitance structure of the semiconductor element itself. By taking out the need for external capacitors and capacitance adjustment elements, the physical size required for surge voltage management is significantly reduced
3Reliability
If parasitic capacitance is increased to reduce surge voltage, then surge voltage is reduced, but turn-off loss increases
Solution Approach 1:
The invention employs dynamic capacitance adjustment by changing the potential difference between the control electrode and high-potential electrode. The parasitic capacitance value is not fixed but varies with operating conditions, allowing the system to optimize between surge voltage reduction and turn-off loss by adjusting capacitance in real-time based on the electrical state
Solution Approach 2:
The invention changes the electrical parameters of the parasitic capacitance by adjusting the potential difference between electrodes. By controlling the voltage state, the capacitance value transitions between different levels, enabling the system to achieve both surge voltage reduction and acceptable turn-off loss through parameter optimization rather than fixed design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device effectively reduces turn-off loss and surge voltage while maintaining a simple structure by adjusting parasitic capacitance values, minimizing physical size and control complexity.
Implementation Method 1
A parasitic capacitance between the control electrode and the high-potential electrode changes according to a potential difference between the high-potential electrode and the low-potential electrode
Data Source
AI summary
A semiconductor device includes a semiconductor element configured to form an upper-lower arm circuit of a power conversion device. The semiconductor element includes a control electrode, a high-potential electrode and a low-potential electrode. A parasitic capacitance between the control electrode and the high-potential electrode changes according to a potential difference between the high-potential electrode and the low-potential electrode. A value of the parasitic capacitance at a time when the potential difference is equal to 80 percent of a breakdown voltage of the semiconductor element is defined as a first capacitance value. An arbitrary value of the parasitic capacitance at a time when the potential difference is in an inclusive range of 20 percent to 40 percent of the breakdown voltage is defined as a second capacitance value. The first capacitance value is larger than the second capacitance value.