Power Semiconductor Terminal Layout for Stable Withstand Voltage
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Solution Overview
Problem
The semi-insulating film in power semiconductor devices introduces fixed charges that vary carrier concentration in the terminal region, inhibiting depletion layer extension and reducing withstand voltage when reverse bias is applied.
Innovation Solution
A power semiconductor device configuration with a semiconductor base, multiple insulating films, and a semi-insulating film that contacts the base and electrodes, with an additional insulating film reducing the contact area between the semi-insulating film and the base, thereby minimizing the impact of fixed charges on carrier concentration and maintaining withstand voltage stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semi-insulating film directly contacts the semiconductor substrate surface in the terminal region, then carrier flow is enabled and leakage current is suppressed, but fixed charge in the semi-insulating film varies carrier concentration and reduces withstand voltage
Solution Approach 1:
The terminal region is divided into multiple contact areas distributed around the cell region, with each contact area having the semi-insulating film contact the substrate. This segmentation reduces the continuous contact area, minimizing fixed charge impact while maintaining carrier flow paths for leakage suppression.
Solution Approach 2:
The semi-insulating film contact configuration is optimized locally in the terminal region, where contact areas are strategically positioned to enable carrier flow only where needed, rather than continuous contact. This local quality adjustment reduces fixed charge impact on overall carrier concentration while maintaining local leakage suppression.
2Ease of operation
If the semi-insulating film has direct contact with the semiconductor substrate, then carrier generated in the terminal region can flow, but the fixed charge inhibits depletion layer extension and reduces withstand voltage
Solution Approach 1:
The continuous contact between semi-insulating film and substrate is segmented into discrete contact areas in the terminal region. This allows carrier flow through the semi-insulating film at specific locations while reducing overall contact area, thereby minimizing fixed charge impact on depletion layer extension and maintaining withstand voltage.
Solution Approach 2:
Instead of complete contact or no contact, partial contact is implemented through multiple contact areas. This partial action provides sufficient carrier flow paths while limiting the total contact area to reduce fixed charge effects, achieving a balance between carrier flow capability and withstand voltage maintenance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration suppresses variations in carrier concentration and leakage current, ensuring stable withstand voltage by reducing the contact area between the semi-insulating film and the semiconductor base, thus preventing a reduction in withstand voltage.
Implementation Method 1
The semi-insulating film has a role of directly having contact with a surface of an Si semiconductor substrate in the terminal region to flow a carrier generated in the terminal region at a time of applying a reverse bias to the electrode
Implementation Method 2
the fixed charge varies the carrier concentration in the terminal region, thereby inhibiting the extension of the depletion layer
Implementation Method 3
suppressed are a variation of a carrier concentration in a surface of a semiconductor substrate of a terminal region and inhibition of an extension of a depletion layer at the time of applying the reverse bias
Data Source
AI summary
An object of a technique of the present disclosure is to suppress reduction in withstand voltage in a power semiconductor device. A semiconductor base includes an n− type semiconductor substrate and at least one p type diffusion layer formed separately from each other on a surface layer on a side of a first main surface of the semiconductor substrate in a terminal region. A power semiconductor device includes at least one insulating film formed on a first main surface of the semiconductor base between an insulating film and the insulating film. A semi-insulating film has contact with the insulating film on the insulating film, and has contact with the first main surface in at least two regions where the insulating film is not formed between the insulating films.