Power Semiconductor Deep Trench Isolation Leakage Compensation

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Solution Overview

Problem

Power semiconductor devices face challenges in achieving both high breakdown voltages and low on-resistance, with drift zones requiring specific doping levels that can lead to increased chip size and costs, and leakage paths at the semiconductor-oxide interface hindering blocking behavior.

Innovation Solution

The method involves forming a deep trench isolation with a compensation semiconductor region of higher doping concentration than the semiconductor layer, which compensates for fixed charges trapped in the trench, ensuring effective field-effect compensation and reducing leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the doping level of the wafer material is reduced to enable small drift zone dimensions, then the breakdown voltage capability is improved, but the on-resistance increases

Engineering Contradiction:
Improvebreakdown voltage capabilityVSAvoidon-resistance
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent applies local quality by creating a compensation semiconductor region with higher doping concentration specifically at the drift zone-trench interface, while maintaining low doping levels in the bulk drift zone. This localized doping adjustment compensates for fixed charges at the interface without increasing overall drift zone resistance, thus resolving the contradiction between breakdown voltage capability and on-resistance.

Inventive Principle:
Principle #3Local quality

2Strength

If deep trench isolation is formed to isolate high voltage regions, then voltage blocking is improved, but leakage paths occur at the semiconductor-oxide interface

Engineering Contradiction:
Improvevoltage blockingVSAvoidleakage currents
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful fixed charges trapped in the trench oxide into a beneficial effect by introducing a compensation semiconductor region with opposite polarity doping. This region compensates for the fixed charges, eliminating the leakage paths they create while maintaining the voltage blocking capability of the deep trench isolation structure.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Area of stationary object

If the chip size is reduced by optimizing drift zone dimensions, then manufacturing cost is improved, but voltage blocking capability deteriorates

Engineering Contradiction:
Improvechip sizeVSAvoidvoltage blocking capability
Core Design Contradiction:
Area of stationary objectVSStrength

Solution Approach 1:

The patent changes the doping concentration parameter locally at the drift zone-trench interface by forming a compensation semiconductor region with higher doping level. This parameter change allows for reduced drift zone dimensions while maintaining voltage blocking capability, thus enabling smaller chip size without sacrificing performance.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of power semiconductor devices with improved voltage blocking capabilities and reduced leakage currents, enabling efficient operation at different voltage levels while maintaining low overall doping levels and chip size.

Implementation Method 1

An amount of the first dopants in the compensation semiconductor region is such that a field-effect of fixed charges of the first electric charge type, which are trapped in the trench, is at least partly compensated next to the wall.

Methodology Applied
Scientific EffectField-effect: Electric Field

Data Source

PatentUS9899470B2Method for forming a power semiconductor device and a power semiconductor device
Publication Date: 2018.02.20 INFINEON TECH AUSTRIA AG
  • US9899470B2 patent drawing
  • US9899470B2 patent drawing
  • US9899470B2 patent drawing

AI summary

A method of forming a power semiconductor device includes providing a semiconductor layer of a first conductivity type extending to a first side and having a first doping concentration of first dopants providing majority charge carriers of a first electric charge type in the layer, and forming a deep trench isolation including forming a trench which extends from the first side into the semiconductor layer and includes, in a vertical cross-section perpendicular to the first side, a wall, forming a compensation semiconductor region of the first conductivity type at the wall and having a second doping concentration of the first dopants higher than the first doping concentration, and filling the trench with a dielectric material. The amount of first dopants in the compensation semiconductor region is such that a field-effect of fixed charges of the first electric charge type which are trapped in the trench is at least partly compensated.