Power Sequencing Controller for Accelerated Boot Time

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Solution Overview

Problem

Traditional computer power sequencing methods are slow and lengthy, causing prolonged boot times, and often require battery backups for real-time clock functionality, which can lead to additional delays if the battery is discharged.

Innovation Solution

A power sequencing method that provides a real-time clock signal at different frequencies to the south bridge before and after power management resets, utilizing a silicon oscillator and a controller to accelerate the boot process without the need for a battery backup, allowing simultaneous execution of power sequencing steps and reducing wait times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional power sequencing methods are used, then the computer boots up reliably, but the boot time is slow and lengthy

Engineering Contradiction:
Improveboot timeVSAvoidboot time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent applies dynamics by changing the frequency of the real-time clock signal dynamically during the power sequencing process. The controller provides the signal at a first frequency before power management resets are complete, and switches to a second frequency after resets are complete, allowing the system to adapt its operation to different stages of initialization and reduce overall boot time.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of signal frequency to optimize boot performance. By providing the real-time clock signal at a higher first frequency during critical initialization phases and then transitioning to a lower second frequency after resets complete, the system accelerates time-critical operations while maintaining stability afterward.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a battery backup is used for real-time clock functionality, then the system maintains time accuracy, but additional delays occur when the battery is discharged

Engineering Contradiction:
Improvetime accuracyVSAvoidboot time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the real-time clock functionality from the battery backup system by providing the real-time clock signal directly from the controller during power sequencing. This eliminates the dependency on battery status and avoids the delays that occur when a discharged battery needs to be replaced or recharged, while maintaining time accuracy through direct controller provision of the signal.

Inventive Principle:
Principle #2Taking out (Extraction)

3Stability of the object's composition

If power management resets are completed before providing real-time clock signal, then signal stability is ensured, but boot time increases

Engineering Contradiction:
Improvesignal stabilityVSAvoidboot time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by providing the real-time clock signal to the south bridge before the power management resets are completed. The controller anticipates the need for the signal and provides it in advance at an appropriate frequency, ensuring that time-critical operations can proceed without waiting for reset completion, thereby reducing boot time while maintaining signal stability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10534415B2Controller and a method for power sequencing a computer
Publication Date: 2020.01.14 RAYTHEON CO
  • US10534415B2 patent drawing
  • US10534415B2 patent drawing
  • US10534415B2 patent drawing

AI summary

A controller and a method for power sequencing a computer. The controller may be configured to provide to a south bridge, before the south bridge has completed power management resets, a real time clock signal at a first frequency, and provide to the south bridge, after the south bridge has completed power management resets, a real time clock signal at a second frequency.