Power Simulator for Reconfigurable Processors
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Solution Overview
Problem
Conventional methods for simulating power consumption in reconfigurable processors with coarse-grained arrays are inefficient, requiring significant time and lacking accuracy.
Innovation Solution
A power simulator that extracts static and dynamic information to calculate an estimated power consumption, using a static information extracting unit, a dynamic information extracting unit, and a calculation unit, which classifies information into static and dynamic components for efficient power estimation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional time-level simulation methods are used for power consumption in reconfigurable processors with coarse-grained arrays, then simulation accuracy is maintained, but simulation time becomes excessively long
Solution Approach 1:
The patent segments the power simulation process into two distinct phases: an initial detailed time-level simulation that captures accurate power consumption patterns, and a subsequent simplified simulation that uses the captured patterns to estimate power consumption without repeating the detailed analysis. This segmentation allows the system to maintain accuracy where needed while reducing overall simulation time.
Solution Approach 2:
The patent performs preliminary action by conducting a detailed time-level simulation first to capture power consumption patterns, activity factors, and operational characteristics. These pre-captured data are then reused in subsequent simulations, eliminating the need to repeat the detailed analysis and significantly reducing simulation time while maintaining accuracy.
2Measurement precision
If detailed time-level simulation is performed to ensure accurate power consumption data, then measurement precision is improved, but productivity decreases due to extended simulation time
Solution Approach 1:
The simulation process is divided into an initial detailed phase for accuracy and subsequent simplified phases for efficiency. The detailed phase captures essential power consumption characteristics, while the simplified phases reuse this information to provide accurate results much faster, thereby improving overall productivity without sacrificing measurement precision.
Solution Approach 2:
The patent creates copies of power consumption patterns and activity factors captured during the initial detailed simulation. These copies are then applied to subsequent simulation scenarios, allowing the system to rapidly estimate power consumption for different configurations and workloads without repeating the detailed analysis, thus enhancing productivity while maintaining accuracy.
3Measurement precision
If comprehensive power simulation is conducted for reconfigurable processor configurations, then measurement precision is maintained, but device complexity increases due to the intricate simulation requirements
Solution Approach 1:
The complex power simulation problem is segmented into manageable components: detailed initial simulation, pattern capture and analysis, and simplified subsequent simulations. This segmentation reduces the apparent complexity by breaking down the intricate process into distinct, manageable stages with clear inputs and outputs at each step.
Solution Approach 2:
By performing preliminary action to capture and store power consumption patterns, activity factors, and operational characteristics in the initial detailed simulation, the system eliminates the need to repeatedly perform complex detailed analyses. This preliminary preparation simplifies subsequent simulations while maintaining measurement precision, thereby reducing overall system complexity.
Data Source
AI summary
Disclosed are a method of simulating power and a power simulator. The power simulator includes a static information extracting unit that extracts static information with respect to execution of the second instruction; a dynamic information extracting unit that extracts dynamic information with respect to the execution of the second instruction; and a calculation unit that calculates an estimated power of the processor based on the static information and the dynamic information.