Monolithic Power Stage Pad Layout for Thermal and Noise Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional monolithic power stage packages for information handling systems face limitations in thermal performance and noise reduction due to high thermal resistance and increased PCB inductance, which restricts power output and requires additional decoupling capacitors, making them unsuitable for both high and low-power applications.
Innovation Solution
The implementation of monolithic power stage packages with wider electrically and thermally conductive pads that provide enhanced thermal performance, reduced noise, and a smaller footprint, allowing for increased heat transfer and fewer decoupling capacitors, while also featuring an adaptive interface for different power applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If more MOSFET cells are added to the monolithic Pstage silicon to lower MOSFET turn-on resistance, then I2R loss is reduced, but the silicon die area increases and cost increases
Solution Approach 1:
The patent changes the physical parameters of the conductive traces by increasing their width and thickness. Specifically, the traces are made wider and thicker to reduce their electrical resistance, which compensates for having fewer MOSFET cells. This parameter change allows the patent to achieve low I2R loss without increasing the silicon die area, as the resistance reduction comes from the trace geometry rather than from adding more active devices.
2Ease of manufacture
If conventional monolithic Pstage packages are used, then manufacturing is simplified, but thermal resistance is high and power output is restricted
Solution Approach 1:
The patent changes the physical dimensions of the conductive traces by making them wider and thicker. This increases the cross-sectional area for heat flow, thereby reducing thermal resistance. The same trace geometry changes that reduce electrical resistance also improve thermal performance, allowing the patent to maintain manufacturing simplicity while achieving better thermal characteristics.
3Device complexity
If conventional monolithic Pstage packages are used, then design is simplified, but PCB inductance increases and noise increases requiring additional decoupling capacitors
Solution Approach 1:
The patent changes the trace geometry by increasing width and reducing length where possible. These dimensional changes reduce the inductance of the power and ground traces. Lower inductance reduces voltage spikes and noise during switching events, which reduces or eliminates the need for additional decoupling capacitors, thereby simplifying the overall design rather than complicating it.
4Adaptability or versatility
If the same monolithic Pstage package is used for both high and low-power applications, then adaptability is improved, but optimization for specific applications may be reduced
Solution Approach 1:
The patent designs a universal monolithic Pstage package with enhanced trace geometry that can serve multiple application domains. The wider and thicker traces provide improved electrical and thermal performance that benefits both high-power server applications and lower-power notebook applications. This universal design eliminates the need for application-specific variants while maintaining reliability through superior inherent performance characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution results in lower MOSFET operating temperatures, increased power output, reduced noise, and lower costs by enabling the same power stage package to be used in both high and low-power applications, optimizing thermal performance and noise reduction.
Implementation Method 1
wider electrically and thermally conductive pads that provide enhanced thermal performance... allowing for increased heat transfer... results in lower MOSFET operating temperatures
Implementation Method 2
multiple separate electrically and thermally conductive pads... including an input power pad coupled to the voltage input... a switching node pad coupled to the voltage output
Data Source
AI summary
Monolithic power stage (Pstage) packages and methods for using same are provided that may be implemented to provide lower thermal resistance/enhanced thermal performance, reduced noise, and/or smaller package footprint than conventional monolithic Pstage packages. The conductive pads of the disclosed Pstage packages may be provided with a larger surface area for contacting respective conductive layers of a mated PCB to provide a more effective and increased heat transfer away from a monolithic Pstage package. In one example, the increased heat transfer away from the monolithic Pstage package results in lower monolithic Pstage package operating temperature and increased power output. In another example, a monolithic Pstage package may be provided with an adaptive application-oriented interface and a multi-function pin that allows the same monolithic Pstage package to automatically detect and select between a relatively higher power information handling system application, and a relatively lower power information handling system VR application.