Power State Based Data Retention in Processing Circuitry
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Solution Overview
Problem
Existing data storage systems in processing circuitry face inefficiencies in power consumption and resource utilization due to ineffective management of data retention across different levels of cache hierarchy, particularly when determining whether to retain or remove data based on processing circuit power states.
Innovation Solution
Incorporating power state determination circuitry to issue control signals for data retention or removal in secondary storage circuitry, considering power states such as normal, wait for interrupt, retention, powerdown, and cluster powerdown to optimize data placement and reduce unnecessary retention, thereby conserving resources and power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is retained in secondary storage circuitry regardless of power state, then data accessibility is maintained, but power consumption increases due to unnecessary retention
Solution Approach 1:
The system dynamically adjusts data retention behavior based on the processing circuit's power state. The control circuitry monitors power state transitions (e.g., from active to powerdown) and adapts retention decisions accordingly, allowing data to be retained when needed and discarded when power is saved, resolving the contradiction between accessibility and consumption
Solution Approach 2:
The invention changes the retention parameter of data based on power state conditions. By monitoring power state and adjusting retention decisions as a function of this parameter, the system optimizes the balance between maintaining data accessibility and reducing power consumption through conditional retention policies
2Reliability
If data is retained in secondary storage circuitry to maintain accessibility, then data availability is improved, but storage space is wasted on unnecessary retention
Solution Approach 1:
The system dynamically adjusts data retention behavior based on the processing circuit's power state. The control circuitry monitors power state transitions (e.g., from active to powerdown) and adapts retention decisions accordingly, allowing data to be retained when needed and discarded when power is saved, resolving the contradiction between accessibility and consumption
Solution Approach 2:
The invention changes the retention parameter of data based on power state conditions. By monitoring power state and adjusting retention decisions as a function of this parameter, the system optimizes the balance between maintaining data accessibility and reducing power consumption through conditional retention policies
3Productivity
If data is moved between storage circuits to optimize utilization, then storage efficiency is improved, but system complexity increases
Solution Approach 1:
The control circuitry automatically monitors power states and makes retention decisions without requiring complex external control mechanisms. The system serves itself by using simple power state detection to trigger appropriate retention actions, achieving storage efficiency while minimizing added complexity
Solution Approach 2:
The invention changes the retention parameter of data based on power state conditions. By monitoring power state and adjusting retention decisions as a function of this parameter, the system optimizes the balance between maintaining data accessibility and reducing power consumption through conditional retention policies
Data Source
AI summary
There is provided an apparatus comprising power state determination circuitry to determine a power state of a processing circuit; and control circuitry to issue a control signal relating to an item of data stored in a first storage circuitry. When the power state of the processing circuit is a predetermined state, the control circuitry issues a further control signal to a second storage circuitry to indicate whether the item of data is to be retained by the second storage circuitry.


