Semiconductor Power Supply Bar Jutted Portion Design

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Solution Overview

Problem

In semiconductor devices with non-hermetically sealed packages, the reduced spacing between wires leads to electrical short-circuits between inner leads and the power supply bar, causing bonding wire deformation and short-circuits during the bonding process.

Innovation Solution

The semiconductor device design includes inner lead portions with tips positioned outside the semiconductor chip, a power supply bar with a jutted portion positioned lower than the inner lead tips, and bonding wires with bent portions outside the chip, preventing accidental collision and deformation during bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the power supply bar is extended to the area between the semiconductor chip and the tip of the inner lead, then the number of leads can be reduced, but the bonding wires are lengthened and prone to collision with the power supply bar during bonding, causing electrical short-circuits

Engineering Contradiction:
Improvenumber of leadsVSAvoidelectrical short-circuit risk
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The power supply bar is extended in the planar direction (another dimension) to reach between the semiconductor chip and inner lead tips, rather than extending vertically or laterally in a way that would interfere with bonding wire placement. This dimensional approach allows the power supply bar to provide additional electrical connections without increasing wire length or collision risk.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The upper face of the jutted portion of the power supply bar is positioned at a height lower than the upper faces of the inner lead tips, creating a local height difference. This local quality variation ensures that even if bonding wires collide with the power supply bar during bonding, the impact is reduced and electrical short-circuits are prevented, while still allowing the power supply bar to extend into the critical area for lead reduction.

Inventive Principle:
Principle #3Local quality

2Ease of operation

If the bonding wires are lengthened to reach inner leads positioned further from the chip, then the spacing between wires must be reduced, but this makes wires prone to electrical short-circuits to one another

Engineering Contradiction:
Improveinner lead positioning flexibilityVSAvoidwire electrical short-circuit risk
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The solution moves the power supply bar extension into the vertical height dimension rather than requiring increased planar spacing. By positioning the jutted portion's upper face at a lower height than the inner lead tips, the design accommodates longer bonding wires without requiring reduced spacing between wires in the planar direction, thus preventing wire-to-wire short-circuits.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The jutted portion of the power supply bar acts as an intermediary structure that provides additional electrical connection points. This allows inner leads to be positioned further from the chip with extended bonding wires while maintaining electrical integrity, as the power supply bar provides alternative connection paths without requiring wires to run closer together.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If the upper face of the jutted portion of the power supply bar is positioned at the same height as the inner lead tips, then the power supply bar can be easily manufactured, but bonding wires collide with the power supply bar during bonding causing deformation and short-circuits

Engineering Contradiction:
Improvepower supply bar fabricationVSAvoidbonding wire integrity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The power supply bar is manufactured with a localized height variation: the jutted portion has its upper face positioned at a lower height than the main body, while maintaining the required electrical connection geometry. This local quality differentiation allows easy manufacturing of the stepped structure while preventing bonding wire collision and deformation during the bonding process.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The jutted portion is designed with a lower height beforehand to cushion or absorb the impact of bonding wires during the bonding process. This pre-designed height difference acts as a protective measure that prevents wire deformation and short-circuits before they can occur, while still allowing the power supply bar to extend into the necessary area for lead reduction.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS8097942B2Semiconductor device including power supply bar having jutted portion, parallel running portion and bent portion and manufacturing method therefor
Publication Date: 2012.01.17 RENESAS ELECTRONICS CORP
  • US8097942B2 patent drawing
  • US8097942B2 patent drawing
  • US8097942B2 patent drawing

AI summary

A semiconductor device and a manufacturing method therefor wherein a wire for coupling an inner lead and a semiconductor chip with each other can be prevented from being electrically short-circuited to any other conductive part are provided. An inner lead portion has a tip arranged outside the outer circumferential end of the semiconductor chip as viewed on a plane. A power supply bar has a jutted portion extended between the outer circumferential end of the semiconductor chip and the tip of the inner lead portion as viewed on a plane. The upper face of the jutted portion is in a position lower than the upper face of the tip of the inner lead portion. A bonding wire for electrically coupling the semiconductor chip and the inner lead portion with each other has a bent portion outside the outer circumferential end of the semiconductor chip as viewed on a plane.