Power Supply Circuit Clock Gating for Digital Control Power Reduction
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Solution Overview
Problem
Digital control circuits in power supply circuits consume more power than analog control circuits, especially when the duty cycle of a PWM signal is constant, which is not effectively addressed by existing technologies.
Innovation Solution
A power supply circuit incorporating an A/D converter, digital filter, PWM signal generator, and operation mode control circuit with a clock gating mechanism that stops clock signals to non-essential circuits when the duty cycle of the PWM signal is fixed, allowing for reduced power consumption by transitioning between variable and fixed duty cycle modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a digital control circuit is used for power supply control, then the number of components is reduced and size is minimized, but power consumption increases compared to analog control circuits
Solution Approach 1:
The control circuit dynamically switches between two operation modes: a first operation mode where the duty cycle is variable and all circuits operate normally, and a second operation mode where the duty cycle is fixed and clock signals are stopped to non-essential circuits. This dynamic adaptation allows the system to minimize power consumption during periods of constant duty cycle while maintaining full functionality when duty cycle adjustment is needed.
Solution Approach 2:
The control circuit periodically monitors the duty cycle of the PWM signal and transitions between operation modes based on whether the duty cycle is changing or remains constant. During periods when the duty cycle is fixed, the system enters a low-power state by stopping clock signals to the A/D converter and digital filter, and only resumes full operation when duty cycle adjustment becomes necessary.
2Use of energy by moving object
If the duty cycle of PWM signal is fixed to reduce power consumption, then power consumption decreases, but the ability to adjust output power is lost
Solution Approach 1:
The operation mode control circuit continuously monitors the duty cycle and dynamically transitions between operation modes based on whether adjustment is needed. When the duty cycle becomes constant, the system switches to the second operation mode with reduced power consumption. When duty cycle adjustment is required, the system automatically switches back to the first operation mode, ensuring adaptability is maintained when needed while maximizing power savings during stable periods.
Solution Approach 2:
The control circuit automatically detects when the duty cycle has become constant and autonomously transitions to the low-power operation mode without external intervention. The PWM signal generator circuit and operation mode control circuit work together to monitor duty cycle changes and self-manage the transitions between operation modes, eliminating the need for external control signals.
3Use of energy by moving object
If clock signals are stopped to digital control blocks, then power consumption is reduced, but the response time for duty cycle adjustment increases
Solution Approach 1:
The operation mode control circuit continuously monitors the duty cycle and detects when it becomes constant, triggering the transition to the low-power operation mode. This preliminary detection mechanism ensures that the system can quickly resume full operation when duty cycle adjustment becomes necessary, minimizing the impact of the stopped clock signals on response time.
Data Source
AI summary
In the case where the duty cycle of the PWM signal exists and the duty cycle of the PWM signal is constant for a certain period, a feedback control circuit is operated intermittently with the duty cycle fixed. Specifically, a power supply circuit includes an A/D converter circuit for forming a digital value based on an analog value obtained by monitoring an output voltage based on a reference voltage, a digital filter circuit for smoothing the digital value, a PWM signal generator circuit for generating a PWM signal based on an output value of the digital filter circuit, and an operation mode control circuit for controlling a circuit operation mode based on the duty cycle of the PWM signal.


