Power Supply Shorting for Fault Injection in Digital Systems
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Solution Overview
Problem
Current fault injection methods for digital systems often require modification of the Device Under Test (DUT) or the use of bulky instruments, limiting their applicability and effectiveness, especially in safety-critical and cryptographic applications, where precise and controlled fault insertion is necessary to validate fault-tolerance and detect potential errors.
Innovation Solution
A system that temporarily and precisely shorts the power supply of a digital device using a switching element, allowing for controlled insertion of faults with high temporal accuracy, which can be integrated into the DUT or used as a laboratory instrument, enabling validation of fault-detection algorithms and testing of safety-critical systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional fault injection methods are used, then faults can be inserted into digital systems, but the complexity of the system increases due to required modifications of the Device Under Test (DUT) or use of bulky instruments
Solution Approach 1:
The patent extracts the fault injection capability from complex external instrumentation and DUT modifications, concentrating it into a simple power supply interruption mechanism. By removing the need for specialized fault injection hardware and DUT modifications, the solution achieves fault insertion while reducing overall system complexity.
Solution Approach 2:
The power supply interruption mechanism serves multiple fault injection purposes across different digital systems and applications. A single simple mechanism can induce various types of faults (computational errors, memory corruption, invalid states) in diverse devices including microprocessors, microcontrollers, FPGAs, and cryptographic devices, eliminating the need for application-specific complex instrumentation.
2Measurement precision
If precise and controlled fault insertion is implemented, then validation of fault-tolerance becomes possible, but the temporal accuracy requirements increase the difficulty of implementation
Solution Approach 1:
The power supply interruption mechanism leverages the inherent temporal precision already present in standard power supply control circuits. By using readily available power supply switching capabilities that naturally provide sufficient temporal accuracy for fault injection, the solution achieves precise controlled fault insertion without requiring specialized high-precision timing instrumentation or complex control systems.
3Reliability
If fault injection is performed using existing methods, then errors can be detected, but the ability to test in-place during normal operation is limited due to laboratory instrument requirements
Solution Approach 1:
The patent extracts fault injection capability from laboratory-only instrumentation and integrates it directly into the operational system through the power supply interface. This allows fault injection to occur in-place during normal system operation rather than requiring removal to laboratory settings, significantly improving operational flexibility while maintaining fault detection capability.
4Reliability
If power supply shorting is applied for extended periods, then protection against excess voltage is achieved, but undesired faults such as device resetting occur
Solution Approach 1:
The patent employs periodic or pulsed power supply interruption rather than extended shorting. By applying the fault condition in controlled, time-limited pulses synchronized with the device operation cycle, the mechanism achieves fault injection for validation purposes while avoiding extended interruptions that would cause undesired effects such as device resetting. The pulsed nature allows precise control over fault duration to remain within safe thresholds.
Solution Approach 2:
The system dynamically adjusts the duration and timing of power supply interruption based on operational context. By making the fault injection parameters adaptive rather than fixed, the mechanism can apply short interruptions during safe operational windows while avoiding critical periods when interruption would cause device reset or other harmful effects, thus achieving protection without generating undesired faults.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise and controlled fault injection, reducing complexity and allowing for validation of fault-tolerance in digital systems, including safety-critical and cryptographic applications, without causing undesired faults, thereby ensuring the detection and correction of errors.
Implementation Method 1
A system that temporarily and precisely shorts the power supply of a digital device using a switching element
Data Source
AI summary
Methods and apparatus are provided for causing the incorrect operation (‘faults’) of digital devices such as embedded computer systems or integrated circuits. The apparatus uses a switching element to cause perturbations on the power supplies of the digital device. This apparatus can be connected to existing embedded systems with a minimal of modifications, and can insert a variety of faults into those embedded systems. Such faults can be used for verification of fault-tolerant systems or algorithms, including both safety-critical designs and cryptographic designs.