Power Supply Memory Segmentation for Firmware Updates

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Solution Overview

Problem

Existing power supply systems lack efficient methods for updating firmware without disrupting power output, leading to potential operational issues and increased costs due to outdated or corrupted firmware.

Innovation Solution

A system that includes a power conversion module, data port, and controller, allowing for the execution of instructions to update firmware while maintaining power output, using a data store with separate portions for booting and post-boot operations, and restricting access to memory during updates to ensure data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If firmware is updated by loading instructions into memory, then the power supply can be upgraded with new functionality, but the power output may be disrupted during the update process

Engineering Contradiction:
Improvefirmware upgrade capabilityVSAvoidpower output continuity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The memory is divided into two separate portions: a first portion containing boot instructions and a second portion containing application instructions. This segmentation allows the controller to execute boot instructions from the first portion while loading and validating new firmware into the second portion, enabling firmware updates without interrupting power output.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary validation of the firmware image (checking checksums and verifying integrity) before loading it into the second memory portion. This preliminary action ensures that only valid firmware is loaded, preventing corruption and ensuring continuous reliable operation during the update process.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If access to memory is restricted during instruction loading, then data integrity is ensured, but the controller cannot execute instructions simultaneously

Engineering Contradiction:
Improvedata integrityVSAvoidcontroller execution continuity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory is divided into two separate portions: a first portion containing boot instructions and a second portion containing application instructions. This segmentation allows the controller to execute boot instructions from the first portion while loading and validating new firmware into the second portion, enabling firmware updates without interrupting power output.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses an intermediary validation process that checks the firmware image (checksum verification) before allowing it to be loaded into the second memory portion. This intermediary step ensures data integrity by preventing corrupted firmware from being executed, while the dual-memory structure maintains controller execution continuity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the entire memory is locked during firmware loading, then corruption is prevented, but the system cannot perform other operations

Engineering Contradiction:
Improvefirmware corruption preventionVSAvoidsystem operation flexibility
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The memory is divided into two separate portions: a first portion containing boot instructions and a second portion containing application instructions. This segmentation allows the controller to execute boot instructions from the first portion while loading and validating new firmware into the second portion, enabling firmware updates without interrupting power output.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Access restrictions are applied locally only to the second memory portion during firmware loading, while the first memory portion remains accessible for executing boot instructions. This local quality approach prevents firmware corruption in the second portion while maintaining system operation flexibility through continuous execution from the first portion.

Inventive Principle:
Principle #3Local quality

4Reliability

If firmware updates require system shutdown, then update safety is improved, but operational downtime increases

Engineering Contradiction:
Improveupdate safetyVSAvoidoperational downtime
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory is divided into two separate portions: a first portion containing boot instructions and a second portion containing application instructions. This segmentation allows the controller to execute boot instructions from the first portion while loading and validating new firmware into the second portion, enabling firmware updates without interrupting power output.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary validation of the firmware image (checking checksums and verifying integrity) before loading it into the second memory portion. This preliminary action ensures that only valid firmware is loaded, preventing corruption and ensuring continuous reliable operation during the update process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8775779B2Controlling access to a power supply memory
Publication Date: 2014.07.08 GOOGLE LLC
  • US8775779B2 patent drawing
  • US8775779B2 patent drawing
  • US8775779B2 patent drawing

AI summary

A system is described that includes a power conversion module, a data port, a controller to receive data from the data port, and a data store containing instructions that when executed by the controller perform operations to control the power conversion module. The operations include executing instructions in a first portion of the data store during booting of the controller, executing instructions in a second portion of the data store after the controller has booted, receiving a signal from the data port indicating the instructions in the second portion are to be modified, receiving from the data port modified instructions to be stored in the second portion, and executing, in response to the signal, the instructions in the first portion to store the modified instructions in the second portion.