Power Supply Noise Rejection via Current-Mode Galvanic Link
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Solution Overview
Problem
Existing power supply circuits face challenges in effectively rejecting noise disturbances, particularly in high-frequency environments, which can lead to inaccurate control signals and reduced stability of output parameters, especially in demanding loads like high-performance processors.
Innovation Solution
A noise disturbance rejection circuit (NDRC) that utilizes a galvanic link to conductively connect two circuit reference potentials, providing a non-zero resistance return path for current mode signals, allowing for the conversion of voltage mode signals into current mode and back, thereby attenuating noise by a factor of at least 10 and improving noise rejection at higher frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If voltage mode signals are used to transmit output parameters across circuit reference domains, then the device complexity is reduced, but noise disturbances significantly degrade control signal accuracy
Solution Approach 1:
The patent introduces a galvanic link as an intermediary element between two circuit reference domains (CRP1 and CRP2). This galvanic link provides a controlled impedance return path that mediates the transmission of current mode signals, allowing accurate signal transfer while blocking noise disturbances. The galvanic link acts as a mediator that enables precise control signal transmission without requiring complex shielding or filtering circuits.
Solution Approach 2:
The patent changes the signal transmission parameter from voltage mode to current mode. Current mode signals are inherently more immune to noise because they are less susceptible to voltage fluctuations and electromagnetic interference. By converting the output parameter transmission to current mode and providing a controlled impedance return path, the system achieves higher noise rejection without significantly increasing circuit complexity.
2Device complexity
If standard power supply circuits are used without noise disturbance rejection, then the device complexity is minimized, but noise disturbances cause instability in output parameters at high frequencies
Solution Approach 1:
The galvanic link serves as an intermediary that stabilizes the return path for current mode signals between different circuit reference domains. By providing a controlled impedance path through the galvanic link, the system maintains stable signal transmission even at high frequencies where noise disturbances would otherwise cause output parameter instability.
Solution Approach 2:
The patent changes the transmission mode to current mode and introduces a controlled impedance return path, which fundamentally improves high-frequency stability. Current mode transmission with proper impedance control rejects high-frequency noise disturbances, maintaining stable output parameters without requiring complex active stabilization circuits.
3Ease of operation
If voltage mode transmission is used across circuit reference domains, then ease of operation is maintained, but noise rejection capability is insufficient for high-performance loads
Solution Approach 1:
The patent changes the signal transmission parameter from voltage mode to current mode, which inherently provides better noise rejection. Current mode signals are less susceptible to electromagnetic interference and voltage fluctuations. The controlled impedance return path through the galvanic link further enhances noise rejection while maintaining relatively simple operation compared to complex differential signaling schemes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces noise disturbances to less than 10% of the output parameter, enabling more accurate control signals and providing a more stable power supply with tighter error tolerance, especially in high-frequency scenarios, meeting the requirements of high-performance loads.
Implementation Method 1
a galvanic link conductively connecting CRP1 and CRP2 and providing a non-zero resistance return path for at least one current mode signal (CMS)
Data Source
AI summary
Apparatus and associated methods relate to a power supply noise disturbance rejection circuit (NDRC) having a first circuit reference potential (CRP1), a second circuit reference potential (CRP2), and a galvanic link conductively connecting CRP1 and CRP2 and providing a non-zero resistance return path for at least one current mode signal (CMS). In an illustrative example, a power supply monitor circuit (PSMC) may be referenced to CRP1 and a control circuit to CRP2. The PMSC may, for example, generate a voltage mode signal (VMS) relative to CRP1 and representing an output parameter of a power supply circuit (PSC), and convert the VMS into a first CMS (CMS1). The control circuit may, for example, generate a control signal for the PSC from CMS1. Various embodiments may advantageously attenuate a noise margin of a CMS presented at the control circuit by a factor of at least 10 relative to an equivalent VMS.


