Power Supply Apparatus PWM Frequency Control for Ripple Reduction
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Solution Overview
Problem
Existing power supply systems face challenges in adjusting DC voltage output effectively during power saving modes, leading to increased ripple in output voltage due to lower drive frequencies, which can result in inadequate voltage adjustment and potential instability.
Innovation Solution
A power supply apparatus with a transformer, switching element, feedback unit, control unit, and clock signal generation mechanism that adjusts the duty of the PWM signal while maintaining a frequency equal to or greater than a predetermined frequency, even at lower drive frequencies, to reduce ripple and ensure stable output voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the frequency of the reference clock is reduced at the time of power saving mode, then power consumption is reduced, but the ripple of the output DC voltage increases
Solution Approach 1:
The patent changes the parameter of PWM signal frequency independently from the reference clock frequency. While the reference clock frequency is reduced for power saving, the PWM signal frequency is maintained at its original level through dedicated PWM generation circuitry, thereby reducing power consumption while preventing ripple increase
2Loss of energy
If the frequency of the PWM signal is reduced at the time of power saving mode, then power consumption is reduced, but the duty resolution decreases
Solution Approach 1:
The patent maintains the PWM signal frequency at its original level even when the reference clock frequency is reduced, thereby preserving the duty resolution. This is achieved by generating the PWM signal using a dedicated timer or counter that operates independently from the reference clock frequency
Solution Approach 2:
The system dynamically adjusts the reference clock frequency for power saving while keeping the PWM generation mechanism operational at its original frequency, allowing the system to adapt power consumption without sacrificing control precision
3Measurement precision
If the same duty resolution is maintained at lower frequency, then voltage adjustment precision is preserved, but output voltage ripple increases
Solution Approach 1:
The patent decouples the PWM signal frequency from the reference clock frequency, allowing the PWM frequency to remain high for low ripple while the reference clock frequency is reduced for power saving. This parameter separation enables independent optimization of both concerns
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for effective adjustment of the PWM signal duty at lower frequencies, reducing ripple and ensuring stable output voltage, thereby addressing the instability issues in power saving modes.
Implementation Method 1
a transformer (108) having a primary winding (Np) and a secondary winding (Ns)
Implementation Method 2
a switching element (107) connected to the primary winding (Np) of the transformer (108), and driven so as to intermittently supply a current to the primary winding (Np)
Implementation Method 3
a feedback unit (120), configured to output a feedback signal according to an output voltage output from the secondary winding (Ns) of the transformer (108)
Data Source
AI summary
The power supply apparatus, when a switching element is driven at a second frequency lower than a first frequency, determines a duty of a pulse signal according to a predetermined voltage so that a frequency of the pulse signal input to a feedback unit is equal to or more than a predetermined frequency.