Power Supply System for 3D Semiconductor Package Assembly
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Solution Overview
Problem
In semiconductor memory devices, integrating a power supply die with memory dies complicates manufacturing and increases costs due to differences in fabrication processes, and the limited horizontal area requires innovative solutions for efficient power distribution in compact structures.
Innovation Solution
A power supply system with multiple voltage regulators and charge pump circuits generates internal voltages for semiconductor dies through a power interconnecting structure like TSVs or metal wires, allowing for efficient power distribution without integrating the power supply die within the memory dies, enabling compact and cost-effective designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a power supply die is integrated with memory dies, then power distribution is achieved, but manufacturing complexity increases and costs rise due to differences in fabrication processes
Solution Approach 1:
The patent divides the power supply system into separate functional modules: a power supply die containing voltage regulators and charge pump circuits, and memory dies containing memory cells. These segmented components are fabricated using different specialized processes and then interconnected through TSVs, resolving the contradiction by allowing each component to be optimized independently while maintaining reliable power distribution.
Solution Approach 2:
The patent introduces TSVs (through-silicon vias) as intermediary connection structures that bridge the power supply die and memory dies. These TSVs serve as the mediating element that enables power distribution between separately fabricated components, avoiding the need to integrate incompatible fabrication processes into a single complex manufacturing flow.
2Adaptability or versatility
If multiple voltage regulators and charge pump circuits are integrated into a single power supply die, then power supply functionality is consolidated, but the die area increases
Solution Approach 1:
The patent merges multiple voltage regulators and charge pump circuits onto a single power supply die, consolidating power supply functionality. This merging allows for efficient power management while the power supply die is designed with optimized layout to minimize area occupation despite the multiple integrated circuits.
3Productivity
If the horizontal area occupied by memory devices is reduced, then storage capacity per unit area increases, but power distribution becomes more challenging in compact structures
Solution Approach 1:
The patent transitions from two-dimensional planar power distribution to three-dimensional vertical power distribution using TSVs. Power is delivered vertically through the stack of memory dies via TSVs, enabling efficient power distribution in compact 3D structures and thereby increasing storage capacity per unit horizontal area while maintaining simplified power distribution architecture.
Data Source
AI summary
An electronic device and a semiconductor package structure are provided. The device includes a plurality of semiconductor dies stacked vertically over each other and a power supply system. The semiconductor dies are stacked over the power supply system. The power supply system includes: a voltage generating circuit configured to generate at least one voltage. The at least one voltage is provided to the plurality of semiconductor dies through a power interconnecting structure. The semiconductor package structure includes a package substrate; at least one semiconductor die disposed on the package substrate; and the power supply system disposed on the package substrate. The at least one semiconductor die may include a plurality of semiconductor dies vertically stacked on the package substrate.