Power Supply Under Voltage Detector Delay Mechanism
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Solution Overview
Problem
Existing power supplying apparatuses for display devices trigger under voltage lock out functions during instantaneous voltage dips, leading to increased input current requirements and larger chip sizes for switching elements and inductors, even when the reference under voltage detection voltage is set high to prevent such errors.
Innovation Solution
Incorporating a delay mechanism in the under voltage detector to delay the input power for a set time before generating the under voltage lock out signal, allowing the apparatus to distinguish between instantaneous and sustained voltage dips, thus preventing false under voltage lock out events and enabling a higher reference voltage detection level without increasing input current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the reference under voltage detection voltage is lowered to prevent under voltage lock out during instantaneous voltage dip, then the voltage range of input power is increased, but the input current must be increased which leads to larger chip size and higher current rating requirements
Solution Approach 1:
The patent applies preliminary action by introducing a delay time mechanism that anticipates instantaneous voltage dips before they trigger the under voltage lock out function. The delay mechanism pre-processes the voltage detection signal, holding it for a predetermined period to distinguish between transient dips and sustained under voltage conditions. This allows the system to maintain a higher reference detection voltage (improving adaptability) while filtering out instantaneous dips through the delay buffer, thereby avoiding the need to increase input current and chip size.
2Quantity of substance
If the reference under voltage detection voltage is increased to reduce input current, then the chip size is reduced, but the under voltage lock out function is triggered during instantaneous voltage dip
Solution Approach 1:
The delay mechanism performs preliminary action by pre-processing the voltage detection signal before it reaches the comparison stage. When voltage dips below the reference level, the delay circuit holds the detection signal for a predetermined time, allowing instantaneous dips to expire before triggering the under voltage lock out function. This enables the system to use a higher reference voltage (reducing chip size) while maintaining operational stability by filtering out transient dips through the delay buffer.
Solution Approach 2:
The delay circuit acts as an intermediary between the voltage detection stage and the under voltage lock out trigger. It mediates the signal transmission by introducing a time buffer that distinguishes between instantaneous dips and sustained under voltage conditions. This intermediary mechanism allows the system to maintain higher reference voltage levels (smaller chip size) while preserving reliability by preventing false triggers from transient dips.
3Reliability
If the under voltage lock out function is performed during instantaneous voltage dip, then circuit operation error is prevented, but input current must be increased leading to larger component sizes
Solution Approach 1:
The delay mechanism applies preliminary action by pre-processing the voltage detection signal to distinguish between instantaneous dips and sustained under voltage conditions. The delay circuit holds the detection signal for a predetermined period before triggering the under voltage lock out function, ensuring that only genuine under voltage events (not transient dips) activate the protection mechanism. This maintains circuit operation accuracy while avoiding the need to increase component current ratings and device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution prevents under voltage protection activation during instantaneous voltage dips, allowing for a higher reference voltage detection level, reducing the size and current rating requirements of switching elements and inductors, and optimizing the power supplying apparatus's design.
Implementation Method 1
an under voltage detector delaying the input power for a delay time, which is set, to generate the under voltage lock out signal
Implementation Method 2
The direct current to direct current converter converts the input power to the direct current voltage in accordance with switching of a switching element based on a pulse width modulation signal
Implementation Method 3
If the switching element is turned on, a current flows to the inductor by means of the input power, whereby energy is accumulated in the inductor
Implementation Method 4
the under voltage detector includes a diode having an anode connected to a first terminal at which the delayed input power is applied and a cathode connected to a second terminal
Data Source
AI summary
A power supplying apparatus is disclosed, in which an under voltage lock out function is not performed for instantaneous voltage dip even in case that a reference under voltage detection voltage is set at high level. The power supplying apparatus comprises an under voltage detector generating an under voltage lock out signal by detecting voltage dip of an input power and performing an under voltage protection function, wherein the under voltage detector delays the input power for a delay time, which is set, to generate the under voltage lock out signal.