Power Supply Voltage Calibration via Dynamic Droop Monitoring
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Solution Overview
Problem
System-level voltage supplies in consumer products, such as desktop computers and smartphones, fail to maintain constant voltage tolerances across varying operating loads, leading to voltage droop and unnecessary power consumption due to excessive voltage margins set for worst-case scenarios.
Innovation Solution
Calibration of the power supply voltage at boot time based on reference voltage measurements from power supply monitors, dynamically adjusting the voltage to maintain target levels across different operating conditions, reducing voltage margins and optimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage margin is increased to ensure minimum operating frequency under worst-case voltage droop, then reliability is improved, but energy consumption increases and productivity decreases
Solution Approach 1:
The patent implements dynamic voltage margin adjustment by continuously monitoring actual voltage droop characteristics and adapting the voltage margin accordingly. Instead of using a fixed worst-case voltage margin, the system dynamically modifies the voltage margin based on measured voltage droop, allowing the processing device to operate at optimal frequency with minimal energy consumption while maintaining reliability under actual operating conditions.
Solution Approach 2:
The patent employs feedback mechanisms where voltage droop measurements from actual operation are fed back to adjust the voltage margin. The system measures voltage droop characteristics during operation and uses this feedback information to optimize the voltage margin setting, ensuring that the minimum operating frequency is maintained while avoiding excessive power consumption associated with oversized voltage margins.
2Reliability
If voltage margin is increased to account for unknown power supply characteristics, then reliability is improved, but device complexity increases due to conservative design requirements
Solution Approach 1:
The patent enables the processing device to self-calibrate its voltage margin by automatically measuring its own voltage droop characteristics during operation. The system performs self-testing and self-adjustment without requiring external calibration equipment or complex pre-configuration, thereby reducing device complexity while ensuring reliable operation under actual operating conditions.
Solution Approach 2:
The patent changes the voltage margin parameter from a fixed conservative value to a dynamically adjusted value based on measured voltage droop characteristics. This parameter change allows the system to adapt to actual power supply behavior, reducing the need for complex worst-case design assumptions and simplifying the overall system configuration.
3Productivity
If fixed voltage is used to maintain constant operating frequency, then productivity is improved, but energy consumption increases due to unnecessary voltage margins
Solution Approach 1:
The patent implements dynamic adjustment of operating voltage based on measured voltage droop characteristics. Instead of maintaining a fixed voltage with excessive margin, the system dynamically optimizes the voltage level to maintain the desired operating frequency while minimizing energy consumption. This allows the processing device to operate efficiently across different load conditions without wasting energy on unnecessary voltage headroom.
Data Source
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AI summary
A processing system (100) includes one or more power supply monitors (PSMs) (200) to measure one or more first voltages corresponding to one or more locations in the processing system. The measurements are performed concurrently with the processing system executing one or more code loops. The processing system also includes calibration logic (135, 705) to modify a second voltage provided to the processing system based on a comparison of a reference voltage and the one or more first voltages. The reference voltage is determined based on previous execution of the one or more code loops by the processing system.