Power Supply Wiring Structure for Semiconductor ICs
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Solution Overview
Problem
In semiconductor integrated circuits with power supply wires in vertically separated wiring layers, existing designs face challenges in routing signal wires without detours due to the placement of power supply stack vias, which hinder wiring tracks and lead to performance degradation from elongated wiring lengths and congestion.
Innovation Solution
The design includes a configuration where power supply stack vias are arranged with intermediate wires and vias positioned to minimize interference with signal wiring, allowing signal wires to be routed directly without detours by aligning intermediate wires and vias in specific layers to reduce the number of hindered tracks and optimize wiring efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power supply stack vias are provided to connect upper-layer and lower-layer power supply wires, then power supply connection is achieved, but signal wire routing is hindered causing detours and wiring congestion
Solution Approach 1:
The patent introduces a position converting wire that extends in a direction different from both the lower-layer power supply wire and upper-layer power supply wire directions. This third directional dimension allows the via connection structure to be established without blocking signal wire routing paths in the original directions, thereby resolving the contradiction between achieving power supply connection and maintaining ease of signal wire routing.
2Reliability
If power supply stack vias are provided to connect power supply wires between layers, then vertical power supply connection is established, but wiring track interference increases leading to elongated wiring lengths
Solution Approach 1:
By extending the position converting wire in a third direction that is different from the directions of both the lower-layer and upper-layer power supply wires, the patent creates a spatial configuration where the via connection structure does not block the original signal wire routing paths. This dimensional approach allows signal wires to maintain their original routing without detours or elongation while still achieving inter-layer power supply connection.
3Reliability
If conventional via structures are used to connect power supply wires, then connection is achieved but wiring congestion occurs due to hindered wiring tracks
Solution Approach 1:
The patent resolves wiring congestion by introducing a position converting wire that extends in a direction different from both the lower-layer power supply wire direction and the upper-layer power supply wire direction. This third directional dimension allows the via connection to be established without blocking existing wiring tracks, thereby maintaining wiring simplicity and reducing device complexity while achieving reliable power supply connection.
Data Source
AI summary
According to an embodiment, a semiconductor integrated circuit including first and second lower-layer power supply wires extending in a first direction and first and second upper-layer power supply wires extending in a second direction is provided. First and second connection wires between the upper-layer power supply wires and the lower-layer power supply wires are arranged in a same line along the second direction. First and second position converting wires extending from the connection wires are arranged between the first and second connection wires. First and second upper-side vias provided on the position converting wires are arranged in a same line along the first direction.