Power Switch Back-Gate Control for Faster MOS Switching
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Solution Overview
Problem
Conventional power switches face challenges with high current consumption and 'turn on' delays due to the use of charge pumps, and the inclusion of storage capacitors increases area requirements, necessitating an improvement in switching speed and efficiency.
Innovation Solution
The proposed power switch employs a state machine with three modes, a gate bias circuit, and a feedback circuit, including a current mirror and Schmitt trigger, to optimize the operation of MOS transistors, reducing delays and improving switching speed by controlling the gate bias voltage and activating/deactivating transistors efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a charge pump is used to control the MOS transistor, then the transistor can be activated and deactivated, but the charge pump consumes significant current and introduces turn-on delay
Solution Approach 1:
The patent applies preliminary action by pre-charging the gate of the MOS transistor through a dedicated charge pump path before full activation is needed. The gate bias circuit prepares the transistor by establishing an intermediate charge state, so that when full activation is required, the transistor can transition more quickly without requiring the main charge pump to deliver the entire charging current, thereby reducing both delay and peak current consumption.
Solution Approach 2:
The patent segments the gate charging function into two separate paths: a main charge pump path for full activation and a gate bias circuit path for preliminary charging and threshold adjustment. This segmentation allows the system to use different charging mechanisms for different operational phases, reducing the burden on the main charge pump and minimizing turn-on delay while controlling current consumption.
2Use of energy by moving object
If a storage capacitor is added to reduce charge pump current consumption, then current consumption decreases, but the capacitor consumes significant area
Solution Approach 1:
The patent changes the operational parameters of the gate bias circuit by dynamically adjusting the bias voltage level based on the operational state. The circuit transitions between different voltage levels and charging modes, allowing it to achieve effective current reduction without requiring large energy storage capacity, thereby avoiding the need for large-area capacitors.
Solution Approach 2:
The gate bias circuit acts as an intermediary between the charge pump and the MOS transistor gate. Instead of directly charging the gate with high current (which causes delay) or using a large capacitor (which consumes area), the bias circuit mediates by providing controlled preliminary charging, thus eliminating the need for large energy storage elements while maintaining fast switching performance.
3Speed
If the switching speed is increased by improving charge delivery, then activation becomes faster, but current consumption increases
Solution Approach 1:
The gate bias circuit performs preliminary charging of the MOS transistor gate, establishing an intermediate charge state before full activation. This preliminary action reduces the amount of charge that needs to be delivered during the main switching event, thereby achieving fast switching speed without requiring high peak current from the charge pump, thus resolving the contradiction between speed and current consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances switching speed and reduces power consumption by effectively managing the gate bias voltage and transistor states, allowing for quicker activation and deactivation of the power switch, thereby improving overall efficiency and area utilization.
Implementation Method 1
a charge pump; a state machine having a first mode, a second mode and a third mode; an first MOS transistor that is coupled between an input terminal and an output terminal and that is coupled to the charge pump at its gate
Implementation Method 2
a buffer that is coupled to the body of the first MOS transistor and the state machine, wherein the buffer provides a gate bias voltage to the body of the first MOS transistor during the third mode
Implementation Method 3
a feedback circuit that is coupled to the state machine and the source of the second MOS transistor
Implementation Method 4
an amplifier that is coupled to the selector, the source of the second MOS transistor, and the charge pump
Implementation Method 5
a current mirror that is coupled between the enable circuit and the bias circuit and that is coupled to the charge pump
Implementation Method 6
the feedback circuit further comprises a Schmitt trigger that is coupled to the bias circuit and the charge pump
Data Source
AI summary
A method for switching between first and second voltages is provided. Initially, a first voltage is provided from a first input terminal to an output terminal through a first MOS transistor, and the first MOS transistor is deactivated. A back-gate of a second MOS transistor is shorted to the output terminal in response to the deactivation of the first MOS transistor and after a settling interval, and the second MOS transistor is activated while its back-gate is shorted to the terminal so as to provide a second voltage from a second input terminal to the output terminal.