Power Switch Module Sequencing to Limit Rush Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power switch modules in chips experience large instantaneous voltage drops due to rush currents when enabling the supply voltage, affecting other chips or circuits, and the use of delay circuits to mitigate this issue increases chip area and design costs.
Innovation Solution
A control method for a power switch module that includes a voltage detection circuit and control circuit to manage the enabling time of multiple switches, reducing rush current by enabling switches gradually based on detected voltage levels, preventing large instantaneous voltage drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple switches are enabled simultaneously in the power switch module, then the power supply can provide sufficient current to the logic circuit, but a large rush current flows causing instantaneous voltage drop affecting other chips or circuits
Solution Approach 1:
The power switch module is divided into multiple independent switches (first switch and second switch) that can be controlled separately. The control circuit enables these switches in a staged manner rather than simultaneously, segmenting the current supply process to avoid rush current while maintaining sufficient power delivery capability.
Solution Approach 2:
The control circuit performs preliminary action by enabling the first switch before the second switch. This sequential enabling ensures that the power supply voltage is gradually applied to the logic circuit, preventing instantaneous voltage drop while still providing sufficient current through the combined capability of multiple switches.
2Object-affected harmful factors
If delay circuits are set between multiple switches to reduce rush current, then the instantaneous voltage drop problem is solved, but chip area and design cost increase
Solution Approach 1:
The control circuit merges the delay functionality into the existing power switch control architecture without adding separate delay circuits. The control circuit integrates the sequential enabling logic for multiple switches, achieving rush current reduction while avoiding the chip area overhead of additional delay circuit components.
Solution Approach 2:
The control circuit performs multiple functions: it controls the enabling timing of multiple switches, monitors voltage levels, and prevents rush current all within a single circuit block. This multi-functionality eliminates the need for separate delay circuits, reducing chip area while still solving the instantaneous voltage drop problem.
Data Source
AI summary
The present invention provides a circuit including a logic circuit and a power switch module. The power switch module includes multiple switches, a voltage detection circuit and a control circuit. Each switch includes a control node, a first node and a second node, the first node is coupled to a supply voltage, the second node is coupled to the logic circuit; and the multiple switches comprise a first switch and multiple second switches, and the control node of the first switch receives a power enable signal. The voltage detection circuit is configured to detect whether a voltage of the second node of the first switch is greater than a reference voltage to generate a detection result. The control circuit is configured to generate an output power enable signal to the multiple second switches according to the detection result.