Dual-Heat-Sink Power Switch Layout for Fault Current Thermal Control
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Solution Overview
Problem
Conventional power switches face limitations in thermal stress management and current rating due to inadequate heat dissipation, which restricts their performance during fault currents and repetitive switch operations.
Innovation Solution
The design incorporates dual heat sinks, thermally conductive connectors, and a structured layout to efficiently dissipate heat generated by power electronics and control electronics boards, ensuring internal temperatures remain within thermal ratings even during high current conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional power switch design is used, then device simplicity is maintained, but heat dissipation capability is insufficient leading to thermal stress and limited current rating
Solution Approach 1:
The power switch device is segmented into distinct functional zones with separate heat dissipation paths. The first heat sink is dedicated to dissipating heat from the power switch, while the second heat sink handles heat from other components. This segmentation allows each heat sink to be optimized for its specific thermal load, improving overall heat dissipation capability without requiring a single complex thermal management system.
Solution Approach 2:
The patent utilizes vertical stacking to arrange components in three-dimensional space. The power switch, first heat sink, and other components are arranged in vertical layers, effectively using the vertical dimension to pack multiple thermal zones into a compact footprint. This dimensional approach increases heat dissipation surface area without proportionally increasing device volume.
2Reliability
If power switch current rating is increased, then fault mitigation capability is improved, but thermal stress increases due to higher heat generation
Solution Approach 1:
The first heat sink acts as an intermediary thermal management component specifically positioned to capture and dissipate heat generated by the power switch during high-current fault mitigation operations. This dedicated intermediate heat dissipation path allows the power switch to operate at higher current ratings without directly transferring excessive thermal stress to other components or the overall device.
3Productivity
If heat dissipation rate is increased, then current rating can be increased, but device volume increases due to larger heat sinks
Solution Approach 1:
The patent employs vertical stacking to arrange the power switch, first heat sink, second heat sink, and other components in three-dimensional layers. This utilizes the vertical dimension to increase heat dissipation surface area without proportionally increasing the device's horizontal footprint or overall volume, allowing higher current ratings in a compact form factor.
Solution Approach 2:
The first heat sink is specifically positioned adjacent to the power switch to provide localized heat dissipation for the highest thermal load component. This local quality approach concentrates thermal management resources where they are most needed, improving heat dissipation efficiency without requiring uniform thermal management across the entire device volume.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the current rating and thermal management of power switches, preventing overheating and allowing them to handle fault currents and repetitive operations without exceeding thermal ratings, thus improving reliability and performance.
Implementation Method 1
a heat sink, the first heat dissipation section of which is coupled to a second side of the power electronics board
Implementation Method 2
heat dissipation
Data Source
Figure 1~2
Figure 3A~4
AI summary
Systems, methods, techniques and apparatuses of power switches are disclosed. One exemplary embodiment is a power switch comprising an outer housing; a power electronics board disposed within the housing and including a semiconductor switch structured to selectively conduct a current between a first power terminal and a second power terminal; a first heat sink coupled to the power electronics board; a plurality of thermally conductive connectors; a second heat sink coupled to the plurality of thermally conductive connectors, a control electronics board structured to control the semiconductor switch, the control electronics board being located within an enclosure formed of the second heat sink, the plurality of thermally conductive connectors, and the power electronics board.