Power Switch Circuit Well Tap Configuration for Semiconductor Area Reduction

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Solution Overview

Problem

Existing semiconductor technologies lack a configuration for power switch circuits that can be used for different types of target circuits, leading to inefficiencies and increased size due to the need for separate power switch circuits for circuits with and without well-tap areas.

Innovation Solution

The semiconductor device employs power switch circuits with and without well-tap areas, allowing for selective use based on the type of target circuit, thereby reducing circuit area and size by eliminating wasted well-tap areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a well tap is added to a power switch circuit, then the circuit can be used for target circuits requiring well taps (such as analog circuits), but the circuit area increases due to the additional well tap structure

Engineering Contradiction:
Improvecompatibility with different target circuit typesVSAvoidpower switch circuit area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent divides power switch circuits into two separate types: one with a well tap area (for analog circuits and standard cells requiring well taps) and one without a well tap area (for standard cells not requiring well taps). This segmentation allows each circuit type to be optimized for its specific application, avoiding the waste of well tap areas in circuits that do not need them.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different structural configurations to different locations in the semiconductor device. Specifically, power switch circuits are configured with or without well tap areas based on the local requirements of the target circuit they serve. This local quality approach ensures that well tap areas are only present where needed, optimizing both adaptability and area utilization.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If separate power switch circuits are provided for circuits with and without well-tap areas, then each circuit can be optimized for its specific type, but the overall device complexity increases due to having multiple circuit configurations

Engineering Contradiction:
Improveoptimization for specific circuit typesVSAvoidnumber of power switch circuit configurations
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent creates a universal power switch circuit design that can serve multiple functions by selectively including or excluding the well tap area. The basic power switch circuit structure remains the same, but the optional well tap area allows the same circuit design to be adapted for different target circuit types (analog circuits, standard cells with well taps, and standard cells without well taps), reducing the need for entirely separate circuit designs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10483255B2Semiconductor device
Publication Date: 2019.11.19 SOCIONEXT INC
  • US10483255B2 patent drawing
  • US10483255B2 patent drawing
  • US10483255B2 patent drawing

AI summary

A semiconductor device includes a first circuit, a second circuit, a first power supply line, a second power supply line coupled to the first circuit, a third power supply line, a fourth power supply line coupled to the second circuit, a first switch circuit including a first switch transistor and a well tap, the first switch transistor including one source or drain end coupled to the first power supply line and another source or drain end coupled to the second power supply line, the well tap being electrically coupled to the second power supply line, and a second switch circuit including a second switch transistor including one source or drain end coupled to the third power supply line and another source or drain end coupled to the fourth power supply line, the second switch circuit including no well tap electrically coupled to the fourth power supply line.