Power Timing Control Using Dual Enable Signals Under Heavy Load
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Solution Overview
Problem
Existing power control technologies fail to prevent controllers from abnormality or breakdown when heavily loaded, leading to potential system failures and data corruption.
Innovation Solution
A power timing control device and method that utilizes a logical-AND-gated operation of primary and auxiliary enable signals to generate control voltages, ensuring the representative moment of control voltage falling to a low level occurs earlier than the minimum operation voltage level, thereby preventing abnormality or breakdown under heavy load conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power control technologies are used to manage power voltage, then power management is achieved, but the controller still becomes abnormal or breaks down when power is heavily loaded
Solution Approach 1:
The patent applies preliminary action by generating the control voltage enable signal in advance before the power voltage reaches the minimum operation level. The logical-AND-gated operation combines the first enable signal from the primary chip with the second enable signal from the auxiliary chip, causing the controlled chip to stop generating control voltage before the power supply voltage drops below the minimum required level. This preventive timing prevents the controller from entering abnormal states or breaking down under heavy power loads.
Solution Approach 2:
The patent implements feedback through the auxiliary chip that monitors the power voltage level and adjusts the second enable signal accordingly. When the power voltage approaches the minimum operation level, the auxiliary chip modifies its enable signal output, which feeds back to the logical-AND-gated operation. This feedback mechanism ensures the controller responds dynamically to power conditions, maintaining reliability by preventing operation below minimum voltage thresholds.
2Power
If the controller operates under heavy power load, then power processing capability is improved, but the controller becomes abnormal or breaks down
Solution Approach 1:
The system performs preliminary action by proactively reducing the control voltage to a low level before the power load causes the controller to become abnormal. The logical-AND-gated operation ensures that when either the primary chip or auxiliary chip detects impending power issues, the controlled chip is instructed to stop generating control voltage in advance, preventing the harmful effects of heavy power loads while allowing normal high-power operation when conditions are favorable.
3Use of energy by moving object
If power voltage is allowed to drop to minimum operation level, then power efficiency is improved, but controller abnormality occurs
Solution Approach 1:
The patent applies preliminary action by stopping the generation of control voltage before the power voltage reaches the minimum operation level. The logical-AND-gated operation, controlled by enable signals from both the primary and auxiliary chips, ensures that the controlled chip is shut down proactively. This prevents controller abnormality while optimizing power efficiency by avoiding operation in the unsafe voltage range rather than allowing operation down to the minimum threshold.
Data Source
AI summary
Power timing control devices and methods are disclosed. Each of one or more controlled chips is enabled based on a logical-AND-gated operation of primary and auxiliary enable signals to generate a control voltage based on a DC power voltage. In a signal timing sequence, a representative moment during the control voltage falling from high to low level occurs earlier than a moment when a level on a signal waveform of the DC power voltage falling from high to low level equals a minimum operation voltage level for the controlled chip. In this way, a power timing control operation can be performed under both light and heavy load conditions of a system, and a controller can be driven for powering up and off the system according to the control voltage, thereby effectively preventing the controller from abnormality or breakdown.