Power Transducer Copper Foil Pattern Optimization

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Solution Overview

Problem

Power transducers face challenges in reducing size due to large current requirements, leading to increased copper foil pattern area, and are prone to short-circuits in humid environments due to lint accumulation between lead terminals.

Innovation Solution

The power transducer design incorporates a copper foil pattern with optimized length and thickness to minimize size while using a partition wall to prevent lint accumulation between lead terminals, ensuring adequate insulation and reducing the risk of short-circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the copper foil pattern area is increased to carry large current, then the current carrying capacity is improved, but the size of the power source board increases

Engineering Contradiction:
Improvecurrent carrying capacityVSAvoidpower source board area
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The patent applies local quality by varying the copper foil pattern thickness in different regions. The copper foil pattern has a first thickness in regions requiring high current carrying capacity (such as near power terminals) and a second, smaller thickness in regions with lower current requirements. This allows the board to handle large currents where needed while minimizing the overall copper area and board size.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If the space between lead terminals is reduced to minimize board size, then the compactness is improved, but lint accumulation increases causing short-circuit risk

Engineering Contradiction:
Improveboard sizeVSAvoidshort-circuit resistance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent solves the lint accumulation problem by transitioning from a two-dimensional planar layout to a three-dimensional structure. Partition walls are erected between adjacent lead terminals, creating vertical separation that prevents lint from bridging between terminals while maintaining compact horizontal spacing. This dimensional addition effectively eliminates the short-circuit risk without increasing the board's footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If the copper foil pattern thickness is increased to reduce resistance, then the electrical conductivity is improved, but the material usage and cost increase

Engineering Contradiction:
Improveelectrical conductivityVSAvoidcopper foil quantity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent optimizes copper foil usage by applying different thicknesses in different regions. Areas requiring low resistance and high conductivity (such as current paths near power terminals) use thicker copper foil, while areas with lower current demands use thinner copper foil. This localized quality variation maintains electrical performance where critical while minimizing overall copper consumption and cost.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP2170025B1Power transducer
Publication Date: 2020.04.08 HITACHI IND EQUIP SYST CO LTD
  • EP2170025B1 patent drawingFigure 1
  • EP2170025B1 patent drawingFigure 2
  • EP2170025B1 patent drawingFigure 3~4B

AI summary

A power transducer is downsized by reducing the size of a power source board and highly reliable. The power source board is provided in the power transducer and for a large-current circuit. The power transducer includes a power semiconductor module having lead terminals. Of the lead terminals provided for the power semiconductor module and connected with the main circuit board, predetermined one or ones of the lead terminals is or are connected with the main circuit board in the vicinity of a main circuit terminal stage and at a position or positions lower than the main circuit terminal stage. Alternatively, predetermined one or ones of the lead terminals is or are connected with the main circuit board at a position or positions lower than a position at which the main circuit terminal stage is provided.