Power Transistor Gate Driving Circuit for Faster Switching
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Solution Overview
Problem
Existing gate driving circuits for power transistors have insufficient pull-up and pull-down capabilities, leading to significant switching power losses due to the lack of active devices, which is a challenge in reducing high-frequency switching losses.
Innovation Solution
A driving circuit and controlling method that utilizes a gate driving circuit and controlling circuit with transistors to output driving and pulse width modulation signals, and a voltage controller to control the transistors, enabling the driving voltage signal to be pulled to a target voltage level, thereby enhancing the pull-up or pull-down capability and reducing switching power losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate driving circuit uses separate gate resistances for on-state and off-state, then the power transistor switching is controlled, but the pull-up and pull-down capabilities are insufficient due to lack of active devices
Solution Approach 1:
The gate resistance is segmented into multiple resistances (first gate resistance, second gate resistance, third gate resistance) arranged in different paths. This segmentation allows independent optimization of pull-up and pull-down paths, with active devices selectively enabling or disabling specific resistance paths to enhance both control reliability and driving capability.
Solution Approach 2:
The gate driving circuit dynamically switches between different resistance configurations using active devices (transistors). The effective gate resistance changes dynamically based on switching state, providing low resistance for fast pull-up when needed and high resistance for controlled pull-down when needed, thereby resolving the contradiction between reliability and capability.
2Device complexity
If the gate driving circuit lacks active devices, then the circuit structure is simpler, but the switching power losses are large due to insufficient pull-up and pull-down capabilities
Solution Approach 1:
The circuit segments the gate driving path into multiple resistance branches with selective active device control. This segmentation enables the circuit to achieve low loss performance by actively selecting optimal resistance paths without requiring a complete redesign of the entire gate driving structure, thus balancing complexity and energy efficiency.
Solution Approach 2:
The circuit changes the effective gate resistance parameter dynamically through active device switching. By adjusting the resistance value according to switching phase (pull-up vs pull-down), the circuit optimizes charging/discharging speeds to minimize overlap time and reduce switching power losses, while maintaining relatively simple overall structure.
Data Source
AI summary
A driving circuit for a power transistor is proposed and includes a gate driving circuit, a controlling circuit and the power transistor. The gate driving circuit outputs a driving voltage signal and a pulse width modulation signal. The controlling circuit is coupled to the gate driving circuit and includes a voltage controller, a first transistor and a second transistor. The voltage controller outputs a controlling signal. The first transistor is turned on or off according to the pulse width modulation signal. The second transistor is turned on or off according to the pulse width modulation signal and the controlling signal. The power transistor coupled to the gate driving circuit and the controlling circuit is controlled by the driving voltage signal. When the first transistor is turned on or the first transistor and the second transistor are turned on, the driving voltage signal is pulled to a target voltage level.