Wide-Bandgap Power Transistor Source Region for Longer SCWT
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Solution Overview
Problem
Existing power transistors face a challenge in balancing low conduction losses with the requirement of a predetermined short-circuit withstand time (SCWT), as high saturation current densities shorten the SCWT, and current designs often compromise on either factor.
Innovation Solution
The introduction of a resistive region with amphoteric impurities, such as Manganese (Mn), within the terminal region of power transistors allows for controlled resistivity modulation, increasing the SCWT by reducing voltage drops and current density through the transistor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If high saturation current density is used to minimize conduction losses, then conduction losses are reduced, but the short-circuit withstand time (SCWT) is shortened
Solution Approach 1:
The patent applies local quality by creating a resistive region with specific amphoteric impurity concentration within the terminal region, while keeping other regions of the transistor with different doping characteristics. This localized modification allows the resistive region to limit peak current during short-circuit conditions without significantly affecting the overall conduction characteristics of the transistor during normal operation.
Solution Approach 2:
The patent changes the physical-chemical parameters of the terminal region by introducing amphoteric impurities (such as manganese) with specific concentration ranges (1×10^16 to 1×10^18 atoms/cm³). This parameter change creates a resistive region with controlled resistivity (0.1 to 10 Ωcm) that can be tuned to achieve the desired balance between conduction losses and short-circuit withstand time.
2Duration of action of moving object
If a resistive region with amphoteric impurities is introduced to extend SCWT, then short-circuit withstand time is extended, but device complexity increases
Solution Approach 1:
The patent merges the resistive region functionality with the existing terminal region structure. The amphoteric impurities are introduced during the same fabrication process steps as the terminal region formation, combining the resistive region creation with the terminal region doping process. This integration approach extends SCWT without requiring separate additional processing steps or structurally complex modifications.
3Manufacturing precision
If amphoteric impurities are implanted to control resistivity, then manufacturing precision is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent achieves precise resistivity control by carefully managing implantation parameters (dose, energy, temperature) of amphoteric impurities. By establishing specific parameter ranges (implantation dose of 1×10^12 to 1×10^14 ions/cm², activation temperature of 800°C to 1200°C), the process achieves consistent resistivity values (0.1 to 10 Ωcm) with high manufacturing precision while keeping the process within standard semiconductor fabrication capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively extends the SCWT while minimizing conduction losses, as the resistive region's controlled resistivity limits peak current during short-circuit conditions without significantly increasing source-to-drain resistance during normal operation.
Implementation Method 1
at least one resistive region formed within the at least one terminal region, the at least one resistive region comprising amphoteric impurities
Implementation Method 2
the at least one resistive region comprising Manganese (Mn) as an amphoteric dopant
Data Source
Figure 1
Figure 2A~2B
Figure 3~4
AI summary
The present invention relates to a transistor (10), in particular a wide bandgap semiconductor power transistor (40), comprising an epitaxial layer (11) of a first conductivity type, at least one well region (13) of a second conductivity type formed in a selected area of the epitaxial layer (11), at least one terminal region, in particular a source region (29), of the first conductivity type formed in or adjacent to the at least one well region (13), at least one terminal electrode (15), in particular a source electrode (21), formed at least partly on a surface (12) of a first part of the at least one terminal region (14), and at least one resistive region (16) formed within the at least one terminal region (14), the at least one resistive region (16) comprising amphoteric impurities. The present invention further relates to a power electronic switching device comprising a plurality of switching cells and a method for manufacturing a transistor (10), in particular a wide bandgap semiconductor power transistor (40) .