Power-Up Power-Down Detecting Circuit Real-Time Timing

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Solution Overview

Problem

Conventional methods for detecting power-up and power-down in semiconductor devices cannot measure power-down entering or exit times in real time, leading to longer standby times and degraded operation speed due to the inability to measure operating currents in real time.

Innovation Solution

A power-up/power-down detecting circuit comprising a power detecting circuit, selecting circuit, determining circuit, and decoder that generates detection signals, selection signals, and completion signals based on sensing signals from function blocks to determine power-up and power-down times, enabling real-time measurement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional current measurement methods are used to detect power-up and power-down, then power dissipation is reduced by powering down circuit blocks, but real-time measurement of power-down entering and exit times cannot be achieved

Engineering Contradiction:
Improvepower dissipationVSAvoidpower-up/power-down standby time
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

A current sensing circuit is introduced as an intermediary component that indirectly measures the operating state of circuit blocks without directly interfering with their power consumption. The sensing circuit converts current flow information into detection signals that can be processed by the selecting and determining circuits, enabling real-time monitoring while maintaining the power-saving benefits of the power-down mode.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The determining circuit generates completion signals (power-up completion signal and power-down completion signal) that provide feedback about the real-time status of circuit blocks. This feedback mechanism allows the system to accurately determine when power-up or power-down is complete, eliminating the need for conservative standby time margins and enabling precise timing control.

Inventive Principle:
Principle #23Feedback

2Loss of energy

If conventional power detection methods are used, then circuit blocks can be powered down to reduce current flow, but operation speed is degraded due to extended standby times

Engineering Contradiction:
Improvecurrent flowVSAvoidoperation speed
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent replaces conventional mechanical or electronic switching methods with a signal-based detection system. Instead of using physical current interruption or complex switching mechanisms, the invention uses sensing circuits that detect current flow patterns and generate corresponding detection signals, which are then processed through logical operations to determine power state transitions. This substitution enables faster, more precise timing measurements.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The power detecting circuit continuously monitors current flow through circuit blocks and generates detection signals in advance of actual power state changes. By performing preliminary detection and signal generation, the system is ready to immediately identify and respond to power-up and power-down transitions, eliminating delays associated with post-event detection and reducing standby time requirements.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7692998B2Circuit of detecting power-up and power-down
Publication Date: 2010.04.06 SAMSUNG ELECTRONICS CO LTD
  • US7692998B2 patent drawing
  • US7692998B2 patent drawing
  • US7692998B2 patent drawing

AI summary

A power-up/power-down detecting circuit may include a power detecting circuit, a selecting circuit, and a determining circuit. The power detecting circuit may generate a plurality of detection signals based on a plurality of sensing signals corresponding to currents flowing through a plurality of function blocks. The selecting circuit may generate a plurality of selection signals. The determining circuit may generate a power-up completion signal and a power-down completion signal. A semiconductor device having the power-up/power-down detecting circuit may determine in real time the power-up time and the power-down time.