Power-Up Sequence Controller for Multi-Chip Semiconductor Packages
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Solution Overview
Problem
In multi-chip semiconductor packages, the peak current during power-up exceeds threshold values, leading to shutdown by the power management integrated circuit (PMIC), as the generation sequences of internal source voltages for memory chips are identical, causing uneven power distribution.
Innovation Solution
A semiconductor device with multiple chips, each having a power-up sequence controller and voltage generator, generating distinct internal source voltages and sequences to distribute peak current evenly across the package, with randomizers and multiplexers controlling the sequences based on power stabilization signals and stored in anti-fuse arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If identical internal source voltage generation sequences are used in multi-chip packages, then the power-up process is simple to control, but the peak current exceeds threshold values causing PMIC shutdown
Solution Approach 1:
Each chip is assigned a unique local characteristic through its individual sequence number (e.g., chip 0 generates voltages in order 0-1-2, chip 1 in order 1-2-0, chip 2 in order 2-0-1). This local differentiation in voltage generation sequencing ensures that peak currents from multiple chips do not occur simultaneously, preventing PMIC shutdown while maintaining overall system reliability.
2Reliability
If different internal source voltage generation sequences are used in multi-chip packages, then the peak current is distributed evenly and PMIC shutdown is prevented, but the device complexity increases
Solution Approach 1:
The voltage generation sequence is made dynamic and adaptable to each chip's identity. Instead of a fixed universal sequence, each chip dynamically selects its sequencing order based on its assigned sequence number. This dynamic approach distributes peak current timing across different chips while using a standardized algorithm that does not require complex external control logic.
Solution Approach 2:
Each chip autonomously determines its own voltage generation sequence based on its sequence number without requiring complex external coordination. The chip's internal voltage generator uses the sequence number to automatically select the appropriate permutation order, enabling self-service operation that simplifies overall system control while achieving peak current distribution.
3Speed
If multiple internal source voltages are generated simultaneously, then the power-up speed is fast, but the peak current becomes excessive and causes system shutdown
Solution Approach 1:
The voltage generation process is divided into periodic phases where each chip generates its internal source voltages in a staggered sequence rather than simultaneously. By using different sequencing orders (e.g., chip 0: 0→1→2, chip 1: 1→2→0, chip 2: 2→0→1), the peak current events are distributed across different time periods, maintaining fast overall power-up while preventing excessive simultaneous current draw.
Data Source
AI summary
A semiconductor device for controlling a power-up sequence is provided. The semiconductor device includes a plurality of chips. Each of the chips includes a power-up sequence controller configured to differently control generation sequences of internal source voltages. The power-up sequence controller changes the generation sequences of the internal source voltages in response to a power stabilization signal which is generated according to an external source voltage applied thereto in powering up the semiconductor device. Accordingly, a power-up current which is generated according to the internal source voltages being generated has a peak current distribution where a peak current may be equally distributed.