Process Proximity Correction for High Aspect Ratio Contacts
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Solution Overview
Problem
As semiconductor processes become more integrated and miniaturized, the complexity of semiconductor layouts increases, leading to significant challenges in process proximity correction due to the high aspect ratio contacts, which existing methods struggle to accurately predict and adjust, resulting in errors during etching processes.
Innovation Solution
A process proximity correction method utilizing a computing device with multiple processors that converts target layouts into images, generates multiple input channels through zooming at various magnifications, performs machine learning to predict after-cleaning images, compares these predictions with target values to generate errors, and adjusts the layouts based on these errors to improve the accuracy of high aspect ratio contact integrity and dispersion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing process proximity correction methods are used, then the layout modification calculation can be performed, but the prediction accuracy for high aspect ratio contacts is insufficient
Solution Approach 1:
The patent applies multi-scale analysis by processing the semiconductor layout at different magnification levels (zoomed-in and zoomed-out views). This dimensional transformation allows the machine learning model to capture both local high aspect ratio contact details and global layout context, significantly improving prediction accuracy for HARC integrity and dispersion while reducing etching process errors
Solution Approach 2:
The patent segments the layout analysis into multiple input channels corresponding to different magnification levels. Each channel processes specific spatial scales independently, allowing the model to focus on different feature hierarchies. This segmentation enables accurate prediction of HARC characteristics at the local level while maintaining overall layout consistency
2Productivity
If the number of patterns in semiconductor layout increases due to higher degree of integration, then the manufacturing capability improves, but the amount of calculation for layout modification increases rapidly
Solution Approach 1:
By transforming the layout into multi-scale image representations, the patent enables parallel processing of different spatial frequencies. The zoomed-out channels capture global patterns efficiently, while zoomed-in channels focus on local details. This dimensional transformation reduces the computational burden of processing highly integrated layouts with numerous patterns
Solution Approach 2:
The machine learning model serves multiple functions simultaneously: it predicts HARC integrity, estimates dispersion effects, and generates layout modifications all within a single unified framework. This multi-functionality reduces the overall calculation time compared to using separate specialized tools for each correction aspect
Data Source
AI summary
A process proximity correction method is performed by a process proximity correction computing device which performs a process proximity correction (PPC) through at least one of a plurality of processors. The process proximity correction method includes: converting a target layout including a plurality of patterns into an image, zooming-in or zooming-out the image at a plurality of magnifications to generate a plurality of input channels, receiving the plurality of input channels and performing machine learning to predict an after-cleaning image (ACI), comparing the predicted after-cleaning image with a target value to generate an after-cleaning image error, and adjusting the target layout on the basis of the after-cleaning image error.