PPI Pad Opening Profile Using Polymer Blocking During Etching
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Solution Overview
Problem
The formation of post-passivation interconnect (PPI) structures in semiconductor devices is hindered by the accumulation of polymer residues during etching, leading to non-uniform etching rates and potential over-etching of conductive pads, which affects the structural integrity and performance of the PPI structures under thermal stress.
Innovation Solution
A method where a polymer layer formed from etching residues is allowed to continuously accumulate during the formation of openings in the passivation layer and conductive pad, acting as a blocking layer to adjust the etching rate, resulting in a PPI structure with controlled turning points and reduced stress at the bottom corners, thereby improving thermal shock resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching is performed to form openings in the passivation layer and conductive pad, then the PPI structure can be formed, but polymer residues accumulate during etching causing non-uniform etching rates and potential over-etching of conductive pads
Solution Approach 1:
The patent converts the harmful polymer residues into a beneficial blocking layer by allowing them to continuously accumulate during etching. This self-formed blocking layer prevents over-etching of the conductive pad while maintaining uniform etching rates, thus transforming the harmful accumulation into a protective mechanism that ensures manufacturing precision.
Solution Approach 2:
The etching process itself generates the polymer residues that form the blocking layer, which then automatically regulates the etching rate. The system uses its own byproduct to control the process, eliminating the need for external intervention to prevent over-etching and ensuring consistent manufacturing precision.
2Reliability
If polymer layer is allowed to continuously accumulate during etching, then over-etching is prevented, but the process complexity increases due to continuous deposition control
Solution Approach 1:
The polymer layer forms automatically from etching residues without requiring external deposition processes. The continuous accumulation is self-regulated by the etching process itself, creating a feedback mechanism that enhances reliability while avoiding additional process complexity.
Solution Approach 2:
The harmful polymer residues are converted into a beneficial blocking layer that automatically adjusts the etching rate. This self-regulating mechanism improves thermal shock resistance through controlled turning points while maintaining process simplicity, as no additional control systems are needed.
3Productivity
If etching rate is increased to improve productivity, then manufacturing efficiency increases, but over-etching of conductive pads occurs affecting structural integrity
Solution Approach 1:
The polymer residues are converted into a protective blocking layer that enables higher etching rates without over-etching. The blocking layer self-regulates the etching process, allowing increased productivity while maintaining precise dimensional control of the conductive pad through automatic rate adjustment.
Solution Approach 2:
The etching rate parameter is dynamically adjusted by the thickness of the polymer blocking layer. As the layer accumulates, it automatically reduces the effective etching rate, preventing over-etching even when high productivity is pursued. This parameter change mechanism ensures dimensional control while maintaining manufacturing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method ensures a desired configuration of the PPI structure is achieved with reduced over-etching of the conductive pad, enhancing the structural integrity and thermal shock performance of the semiconductor device.
Implementation Method 1
a polymer layer formed from etching residues is allowed to continuously accumulate during the formation of openings in the passivation layer and conductive pad, acting as a blocking layer to adjust the etching rate
Data Source
AI summary
One of the semiconductor devices includes a semiconductor device includes a conductive pad, a passivation layer and a conductive pattern. The passivation layer surrounds the conductive pad and has a sidewall interfacing with a sidewall of the conductive pad. The conductive pattern is disposed in the passivation layer and electrically connected to the conductive pad, wherein a first surface of the conductive pattern interfacing with the passivation layer and the conductive pad has at least one turning point.