Post-Passivation Interconnect Trenches for Bump Positioning
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Solution Overview
Problem
In modern integrated circuits, maintaining the position of bumps during flip-chip packaging and wafer level chip scale packaging is challenging due to miniature scale issues, leading to bump bridging and shifting problems that affect yield.
Innovation Solution
A method involving the formation of a post-passivation interconnect (PPI) with trenches adjacent to the receiving area on the PPI, which prevents the conductor from interacting with the PPI external to the trench during reflowing or wetting, ensuring accurate positioning and reducing stress distribution issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If bumps are disposed on the semiconductor substrate at miniature scale, then integration density is improved, but bump position stability deteriorates leading to bridging and shifting issues
Solution Approach 1:
The patent divides the bonding pad structure into multiple segments: a receiving area for the bump, and separate trench regions that act as isolation barriers. This segmentation prevents the bump from interacting with adjacent PPI structures, thereby maintaining position stability while allowing high integration density.
Solution Approach 2:
The patent introduces trenches as intermediary structures between the bump receiving area and the external PPI regions. These trenches act as mediators that prevent direct interaction and potential bridging, ensuring accurate bump positioning without compromising integration density.
2Reliability
If conductor is allowed to interact with PPI external to receiving area during reflowing, then electrical connectivity is improved, but conductor position stability deteriorates causing shift and cracking
Solution Approach 1:
The bonding pad structure is segmented into a receiving area and isolated trench regions. This segmentation allows the conductor to maintain electrical connectivity within the receiving area while preventing unwanted interaction with external PPI structures that would cause shifting and cracking.
Solution Approach 2:
The patent applies different structural qualities to different regions: the receiving area provides a controlled environment for conductor interaction ensuring stability, while the trench regions provide isolation to prevent harmful interactions, thus achieving both connectivity and position stability.
Data Source
AI summary
In some embodiments in accordance with the present disclosure, a semiconductor device including a semiconductor substrate is received. An interconnect structure is provided over the semiconductor substrate, and a passivation is provided over the interconnect structure. The passivation includes an opening such that a portion of the interconnect structure is exposed. Moreover, a dielectric is provided over the passivation, and a post-passivation interconnect (PPI) is provided over the dielectric. The PPI is configured to connect with the exposed portion of the interconnect structure through an opening in the dielectric. Furthermore, the PPI includes a receiving area for receiving a conductor, and a trench adjacent to the receiving area. In certain embodiments, the receiving area is defined by the trench.