DRAM Post-Package Repair Across Bank Groups
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Solution Overview
Problem
Dynamic random access memory (DRAM) devices face increased failure rates due to tighter internal timing requirements and greater densities, leading to data retention and access issues, which existing technologies do not adequately address through effective post-package repair mechanisms.
Innovation Solution
Incorporation of a post-package repair (PPR) storage array that maps row failures across DRAM bank groups, utilizing a fully associative content addressable memory with spare memory rows, allowing for flexible utilization of redundant storage cells and improved reliability through hard and soft remapping sequences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If DRAM density is increased to improve storage capacity, then storage capacity is improved, but failure rate increases due to tighter timing requirements and data retention issues
Solution Approach 1:
The memory system is segmented into multiple bank groups, each with independent PPR capabilities. This segmentation allows isolated repair of defective rows in specific bank groups without affecting other banks, enabling higher overall density while maintaining reliability through localized error handling.
Solution Approach 2:
Spare memory rows are pre-configured and prepared in advance within each bank group. When a row failure is detected, the system can immediately remap to a pre-prepared spare row without requiring external repair intervention, thus maintaining system reliability as density increases.
2Ease of repair
If traditional PPR mechanisms are used within individual bank groups, then local row failures can be repaired, but cross bank group row failures cannot be addressed
Solution Approach 1:
The PPR mechanism is designed with universal spare rows that can serve any bank group. The spare rows are not dedicated to a single bank group but can be dynamically allocated to repair failures in any bank group, providing both local repair capability and cross bank group adaptability.
Solution Approach 2:
A centralized PPR control mechanism acts as an intermediary between multiple bank groups and the spare rows. This mediator manages the allocation and remapping of spare rows across bank group boundaries, enabling cross bank group repair while maintaining ease of local repair operations.
3Reliability
If more spare memory rows are allocated for repair, then reliability is improved, but storage capacity is reduced due to fewer usable memory cells
Solution Approach 1:
Spare rows from multiple bank groups are merged into a shared pool of repair resources. Instead of dedicating separate spare rows to each bank group, the system combines spare resources across bank groups, improving overall repair capability while minimizing the total number of non-usable cells and maximizing storage capacity.
Data Source
AI summary
A dynamic random access memory (DRAM) device includes a plurality of bank groups of first storage cells, each bank group arranged as a plurality of banks, each bank arranged as a plurality of rows, and each row including a plurality of dynamic storage cells. The DRAM device further includes a post-package repair (PPR) storage array arranged as a plurality of entries, wherein the DRAM device is configured to map a first row failure in a first bank group to a first entry of the PPR storage array, and to map a second row failure in a second bank group to a second entry of the PPR storage array.