Post Package Repair Fuse Segmentation for Semiconductor Yield

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Solution Overview

Problem

The inefficiency in repairing defective memory cells in semiconductor memory devices leads to high production costs and yield loss, as conventional post-package repair (PPR) methods often result in abnormal fuse operation during refresh operations, especially when multiple word lines are activated simultaneously.

Innovation Solution

A repair device and semiconductor memory device design that selectively uses a fuse region for Hard-Post Package Repair (HPPR) mode, dividing the fuse region into even and odd groups to alternately use fuses for memory cell regions, ensuring normal operation during refresh operations by generating specific clock signals and repair signals to detect and output available fuses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional PPR methods are used to repair defective memory cells, then production yield can be improved, but fuse operation becomes abnormal during refresh operations when multiple word lines are activated simultaneously

Engineering Contradiction:
Improveproduction yieldVSAvoidfuse operation normality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The fuse array is divided into multiple independent fuse groups (first fuse group, second fuse group, etc.), each corresponding to different memory cell regions. This segmentation allows selective activation of specific fuse groups during refresh operations, preventing abnormal interactions between multiple word lines and ensuring reliable fuse operation while maintaining high production yield through effective defect repair.

Inventive Principle:
Principle #1Segmentation

2Speed

If multiple word lines are activated simultaneously during refresh operations, then memory access speed is improved, but fuse operation becomes abnormal

Engineering Contradiction:
Improvememory access speedVSAvoidfuse operation normality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

Different fuse groups are assigned to different memory cell regions with specific operational characteristics. During refresh operations, the system activates only the fuse group corresponding to the current operational region, ensuring that fuse operation remains normal even when multiple word lines are activated simultaneously in different regions. This local quality assignment prevents global interference while maintaining high-speed access.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If the entire fuse region is used for repair operations, then repair capability is improved, but available fuse detection becomes complex

Engineering Contradiction:
Improverepair capabilityVSAvoidfuse detection complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The fuse array is segmented into multiple fuse groups, each independently manageable. This segmentation simplifies the detection of available fuses by allowing the system to check each fuse group separately rather than managing the entire fuse region as a single complex unit. The segmentation maintains comprehensive repair capability while reducing detection complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system includes an output circuit that detects and provides feedback information about the status of fuses in each fuse group. This feedback mechanism tracks which fuses are available and which have been used, enabling intelligent selection of fuses for repair operations. The feedback system simplifies management by automatically monitoring fuse status across the segmented array.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10672498B2Repair device and semiconductor device including the same
Publication Date: 2020.06.02 SK HYNIX INC
  • US10672498B2 patent drawing
  • US10672498B2 patent drawing
  • US10672498B2 patent drawing

AI summary

A repair device and a semiconductor device including the same are disclosed, which relate to a technology for a Post Package Repair (PPR) device. The repair device includes: a clock generator configured to generate a fuse clock signal based to corresponding to an available fuse; a fuse selection circuit configured to discriminate between a first clock signal and a second clock signal in the fuse clock signal; a fuse signal generator configured to output a first repair signal corresponding to the first clock signal and a second repair signal corresponding to the second clock signal during a post package repair (PPR) mode; and an output circuit configured to output a first output signal by detecting address information of the remaining unused fuses in response to the first repair signal, or configured to output a second output signal by detecting address information of the remaining unused fuses.