Distributed PPS Clock Synchronization With Hardware Jitter Capture
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Solution Overview
Problem
In distributed computing environments, synchronizing system clocks across multiple devices is challenging due to independent notions of time, leading to difficulties in determining the order of conflicting requests and requiring accurate timestamping for regulatory compliance, which existing techniques like NTP often fail to provide with sufficient accuracy or complexity.
Innovation Solution
Implementing a clock disciplining scheme using a Pulse Per Second (PPS) signal derived from an atomic clock, combined with additional hardware to capture the PPS signal relative to a hardware clock counter, reducing jitter and achieving highly accurate clock synchronization within 100 microseconds of UTC time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If NTP is used to synchronize clocks in a distributed network, then time synchronization is achieved, but the accuracy is insufficient and the system becomes complex
Solution Approach 1:
The patent extracts the timing function from the general network communication infrastructure by introducing a dedicated timing network separate from the data network. This dedicated timing network carries only timing signals, isolating the timing function from data transmission complexities and enabling high-precision synchronization without the overhead of general NTP protocols.
Solution Approach 2:
The patent introduces atomic clocks as intermediary time reference devices that receive timing signals from the master clock and distribute them to slave devices. These atomic clocks act as mediators that buffer and stabilize timing signals, reducing jitter and improving synchronization accuracy across the distributed system.
2Adaptability or versatility
If independent time notions are maintained on each device, then device autonomy is preserved, but determining the order of conflicting requests becomes difficult
Solution Approach 1:
The patent creates a common time reference plane across all devices in the distributed system by synchronizing all clocks to the same master clock via the dedicated timing network. This equipotential time reference ensures that all devices operate from the same temporal baseline, eliminating ambiguity in determining the order of events while preserving device autonomy for processing decisions.
3Ease of manufacture
If standard clock synchronization methods are used, then implementation is simple, but accuracy within 100 microseconds of UTC time cannot be achieved
Solution Approach 1:
The patent replaces software-based NTP protocols with hardware-based timing signal distribution using dedicated timing networks and atomic clocks. This substitution of mechanical/hardware timing mechanisms for software timing protocols enables microsecond-level precision while maintaining relatively simple implementation through dedicated hardware pathways immune to software jitter and network variability.
Data Source
AI summary
A clock disciplining scheme uses a pulse per second (PPS) signal that is distributed throughout a network to coordinate timing. In determining the time, jitter can occur due to latency between detection of the PPS signal and a software interrupt generated there from. This jitter affects the accuracy of the clock disciplining process. To eliminate the jitter, extra hardware is used to capture when the PPS signal occurred relative to a hardware clock counter associated with the clock disciplining software. In one embodiment, the extra hardware can be a sampling logic, which captures a state of a hardware clock counter upon PPS detection. In another embodiment, the extra hardware can initiate a counter that calculates a delay by the clock disciplining software in reading the hardware clock counter. The disciplining software can then subtract the calculated delay from a hardware clock counter to obtain the original PPS signal.