On-Chip Multi-Core PR Allocation Minimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In system on chip (SoC) multi-core systems, the fragmentation of partial regions (PRs) in the reconfigurable resource pool leads to underutilization of resources and increased reconfiguration time due to inefficient allocation and reconfiguration management of PRs.

Innovation Solution

An on-chip multi-core system with a PR map, core unit, PR resource management processor, inter-PR routing controller, bitstream memory, and intra-PR configuration controller, which sets topologies for PRs based on required configurations, assigns weights for efficient use, and selects optimal topologies to minimize fragmentation and reconfiguration time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If adjacent PRs are grouped and allocated to configure flexible accelerators, then resource utilization is improved, but fragmentation phenomenon occurs leading to underutilization of available PRs

Engineering Contradiction:
Improveresource utilizationVSAvoidfragmentation phenomenon
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the reconfigurable resource pool into multiple reconfigurable regions (RRs), each comprising multiple partial regions (PRs). This segmentation allows independent management and allocation of RRs to different cores, preventing the fragmentation problem that occurs when PRs are allocated individually. The RR acts as a larger allocation unit that maintains contiguity while enabling fine-grained reconfiguration within each RR.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical allocation structure where allocation occurs at two levels: first at the RR level (coarser granularity) and then at the PR level within each RR (finer granularity). This two-dimensional allocation approach allows the system to maintain large contiguous blocks (RRs) while still enabling efficient resource distribution, thereby avoiding fragmentation while maintaining high resource utilization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If PRs are allocated and reconfigured repeatedly, then flexibility is improved, but reconfiguration time increases due to fragmentation

Engineering Contradiction:
ImproveflexibilityVSAvoidreconfiguration time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent pre-divides the reconfigurable resource pool into multiple reconfigurable regions (RRs) with defined boundaries and contiguity relationships before allocation. This preliminary structuring allows the system to perform rapid allocation by selecting entire RRs rather than individually configuring PRs, significantly reducing reconfiguration time while maintaining flexibility through subsequent PR-level reconfiguration within each RR.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If PR allocation is performed centrally, then resource management is simplified, but allocation efficiency decreases due to lack of parallel processing

Engineering Contradiction:
Improvemanagement simplicityVSAvoidallocation efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent divides the centralized resource management function into distributed RR management units, where each RR can be independently allocated and configured. This segmentation enables parallel processing of allocation requests for different RRs, improving allocation efficiency while maintaining manageable complexity through standardized RR interfaces and a hierarchical management structure.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240281295A1On chip multi-core system and optimizing method for partial region resource selection
Publication Date: 2024.08.22 SK HYNIX INC
  • US20240281295A1 patent drawing
  • US20240281295A1 patent drawing
  • US20240281295A1 patent drawing

AI summary

Proposed are an on chip multi-core system and an optimizing method for PR resource selection in which management for allocating a plurality of partial regions (PRs) constituting a reconfigurable resource pool to a corresponding core of multiple cores and management for reconfiguring the inside of each PR can be separately performed, fragmentation can be minimized after the allocation of the PRs, and the reconfiguration time of an accelerator can be shortened. The on chip multi-core system includes a PR map, a core unit, a PR resource management processor, an inter PR routing controller, a bitstream memory, and an intra PR configuration controller.