PRA Command for SDRAM Bank Access Efficiency
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Solution Overview
Problem
Conventional SDRAM memory control methods are inefficient due to idle cycle times and limited simultaneous bank access, requiring sequential PRECHARGE and ACTIVE commands for row activation, which restricts bus utility and reduces the number of banks that can be accessed simultaneously.
Innovation Solution
A special 'PRECHARGE with ACTIVE' (PRA) command is introduced, which combines the functions of conventional PRECHARGE and ACTIVE commands, allowing for the simultaneous deactivation and activation of rows within a bank, thereby reducing command bus utilization and enabling access to a maximum of six banks within 12 cycle times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional PRECHARGE and ACTIVE commands are used sequentially, then row deactivation and activation are completed, but the command bus utility is inefficient with idle cycle times
Solution Approach 1:
The patent combines the PRECHARGE and ACTIVE commands into a single PRA command that performs both row deactivation and activation in one operation. This merging eliminates the idle cycle times between the two separate commands, improving bus utility by reducing the total command execution time while maintaining the necessary memory operations.
Solution Approach 2:
The PRA command enables continuous useful action on the command bus by eliminating idle cycles. Instead of having the bus idle between PRECHARGE and ACTIVE commands, the unified PRA command keeps the bus continuously productive, delivering commands without interruption and maximizing bus utilization.
2Productivity
If sequential PRECHARGE and ACTIVE commands are used, then row access is completed, but the number of banks that can be accessed simultaneously is limited
Solution Approach 1:
By merging PRECHARGE and ACTIVE into a single PRA command, the patent doubles the number of banks that can be accessed within a given time frame. From three banks with sequential commands, the system can now access six banks simultaneously using the unified command, effectively increasing bank access capacity without proportionally increasing command sequence complexity.
3Productivity
If multiple commands are delivered through the command bus, then memory operations are completed, but the bus utility is inefficient
Solution Approach 1:
The patent reduces the quantity of commands by merging PRECHARGE and ACTIVE into a single PRA command. This reduction in command count directly improves command delivery efficiency, as fewer commands need to be transmitted through the bus, reducing overhead and improving overall system productivity.
Data Source
AI summary
A memory control method, a memory controller, and a memory device implementing the method are provided. The memory controller controls the memory device comprising a plurality of banks, and a first row in a bank is activated for access. The memory controller receives a request for access of a second row in the bank and delivers a special command to the memory device. The memory device deactivates the first row and activates the second row upon receipt of the special command.


