Programmable Resistive RAM Integration via CMOS-First Fabrication

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Solution Overview

Problem

The integration of nonvolatile memory into multi-function integrated circuits poses challenges due to differing fabrication requirements, leading to compatibility issues and complex modifications in the fabrication process.

Innovation Solution

A method is developed to form integrated circuits with nonvolatile memory cells by conductingly connecting programmable resistive elements with conductive rows and columns in a specific order, minimizing damage during the fabrication process, and using a stairstep profile for conductive columns with etching endpoint and selectivity differences, along with dielectric layers for precise etching control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If nonvolatile memory is integrated into multi-function integrated circuits, then storage functionality is added, but fabrication compatibility issues and process complexity increase

Engineering Contradiction:
Improvestorage functionalityVSAvoidfabrication process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The fabrication process is segmented into distinct stages: first forming the access circuitry (transistors, interconnects) using standard CMOS processes, then subsequently forming the resistive memory elements in a separate programming step. This segmentation allows each part to be optimized independently while maintaining overall compatibility

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The access circuitry is formed in advance using well-established CMOS fabrication processes before the resistive memory elements are introduced. This preliminary action allows the use of mature, compatible processes for the access circuit while leaving room for specialized memory formation steps

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If programmable resistive elements are formed early in the fabrication process, then integration is simplified, but the elements are damaged by subsequent access circuitry formation processes

Engineering Contradiction:
Improveintegration simplicityVSAvoidresistive element integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Instead of forming the resistive memory elements first and then risking damage during access circuitry formation, the approach is inverted: the access circuitry is formed first using robust CMOS processes, and only then are the delicate resistive elements formed in a final programming step that uses gentle deposition and annealing processes

Inventive Principle:
Principle #13The other way round (Inversion)

3Ease of manufacture

If standard CMOS fabrication processes are used for access circuitry, then manufacturing compatibility is maintained, but nonvolatile memory formation requires additional modifications

Engineering Contradiction:
Improvemanufacturing compatibilityVSAvoidprocess modifications
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The fabrication process is designed so that the access circuitry uses universal, standard CMOS processes that can be manufactured using existing foundry capabilities. The resistive memory elements are then added using a multi-functional programming step that can be integrated into the existing CMOS flow without requiring entirely new manufacturing equipment or processes

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the integration of nonvolatile memory into existing integrated circuits, reduces compatibility issues, and allows for efficient fabrication of memory cells with improved yield and electrical performance, while maintaining the functionality of mission circuitry.

Implementation Method 1

programmable resistive nonvolatile memory cells, such as phase change memory

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 2

The first and second layers of conductive columns have at least one of an etching endpoint signal difference and an etching selectivity difference

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS7741636B2Programmable resistive RAM and manufacturing method
Publication Date: 2010.06.22 MACRONIX INTERNATIONAL CO LTD
  • US7741636B2 patent drawing
  • US7741636B2 patent drawing
  • US7741636B2 patent drawing

AI summary

Integrated circuit nonvolatile memory uses programmable resistive elements. In some examples, conductive structures such as electrodes are prepared, and the programmable resistive elements are laid upon the prepared electrodes. This prevents contamination of the programmable resistive elements from previous fabrication steps.