PRAM Lower Electrode Contact Layer Peltier Heating

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Solution Overview

Problem

Conventional PRAM devices face challenges in reducing the reset current while maintaining or decreasing the set resistance, which is essential for smaller transistor sizes and higher integration, as existing methods often compromise manufacturing yield and reliability due to increased Joule heating.

Innovation Solution

The use of a lower electrode contact layer with a negative Seebeck coefficient and lower heat conductivity than TiAlN, such as n-type SiGe or PbTe, allows for a lower reset current without increasing the set resistance by leveraging the Peltier effect to generate more heat, thereby reducing the reset current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the lower electrode contact layer uses conventional materials like TiAlN, then the set resistance is maintained, but the reset current is high which limits transistor size reduction and integration

Engineering Contradiction:
Improvereset currentVSAvoidmanufacturing yield and reliability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent changes the material parameters of the lower electrode contact layer by selecting materials with specific Seebeck coefficients (α2) and heat conductivities (k2). By choosing materials where |α2| > |α1| and k2 < k1, the Peltier heating efficiency is improved, allowing reset current to be reduced while maintaining reliable phase change and manufacturing yield.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material selection for the lower electrode contact layer, choosing from specific material families (n-type SiGe, PbTe, InTe, InSb, GaSb, n-type polysilicon, or cobalt silicon) that combine appropriate Seebeck coefficient and heat conductivity properties. This composite approach allows optimization of both reset current and reliability simultaneously.

Inventive Principle:
Principle #40Composite materials

2Productivity

If the transistor size is reduced for higher integration, then the device density increases, but the reset current cannot be reduced which compromises manufacturing yield and reliability

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing yield
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By changing the thermal and electrical parameters of the lower electrode contact layer materials, the patent enables reduced reset current that is compatible with smaller transistor sizes. The improved Peltier effect efficiency allows higher integration density without sacrificing manufacturing yield.

Inventive Principle:
Principle #35Parameter changes

3Power

If methods are used to reduce reset current, then the power consumption decreases, but the set resistance increases which affects device performance

Engineering Contradiction:
Improvereset currentVSAvoidset resistance
Core Design Contradiction:
PowerVSManufacturing precision

Solution Approach 1:

The patent simultaneously optimizes multiple material parameters (Seebeck coefficient, heat conductivity) of the lower electrode contact layer to achieve reduced reset current while maintaining set resistance within acceptable ranges, thus improving both power efficiency and manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables a decrease in reset current while maintaining set resistance, facilitating the manufacturing of smaller transistors and increasing PRAM device integration without reliability issues.

Implementation Method 1

The use of a lower electrode contact layer with a negative Seebeck coefficient and lower heat conductivity than TiAlN, such as n-type SiGe or PbTe, allows for a lower reset current without increasing the set resistance by leveraging the Peltier effect to generate more heat

Methodology Applied
Scientific EffectPeltier effect: Peltier Effect

Implementation Method 2

A PRAM storage node may use a phase change layer that changes the phase of a crystalline state of lower resistance to an amorphous state with a higher resistance

Methodology Applied
Scientific EffectPhase change: Phase Change

Data Source

PatentUS7705343B2Phase change random access memory devices and methods of operating the same
Publication Date: 2010.04.27 SAMSUNG ELECTRONICS CO LTD
  • US7705343B2 patent drawing
  • US7705343B2 patent drawing
  • US7705343B2 patent drawing

AI summary

Provided are phase change random access memory (PRAM) devices and methods of operating the same. The PRAM device may include a switching device, a lower electrode, a lower electrode contact layer, a phase change layer and/or an upper electrode. The lower electrode may be connected to a switching device. The lower electrode contact layer may be formed on the lower electrode. The phase change layer, which may include a bottom surface that contacts an upper surface of the lower electrode contact layer, may be formed on the lower electrode contact layer. The upper electrode may be formed on the phase change layer. The lower electrode contact layer may be formed of a material layer having an absolute value of a Seebeck coefficient higher than TiAlN. The Seebeck coefficient of the lower electrode contact layer may be negative. The material layer may have lower heat conductivity and/or approximately equivalent electrical resistance as TiAlN.