PRAM Lower Electrode Resistivity Optimization
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Solution Overview
Problem
Phase-change random access memory (PRAM) devices consume excessive power due to high write current requirements for transforming phase-change materials between crystalline and amorphous states, which affects operational efficiency and energy consumption.
Innovation Solution
A semiconductor device design featuring a lower electrode with resistivity ranging from 1 to 30 mΩ·cm, composed of materials like TiSiN, to optimize the write current between 55 μA and 95 μA, thereby reducing power consumption and ensuring effective phase-change operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high write current is applied to transform phase-change material between crystalline and amorphous states, then phase-change operation is achieved, but power consumption increases excessively
Solution Approach 1:
The patent changes the electrical resistivity parameter of the lower electrode from conventional low-resistivity materials to a specific range (1-30 mΩ·cm). This parameter modification allows the electrode to generate sufficient Joule heat for phase-change transformation while limiting excessive current flow, thereby achieving reliable phase-change operation with reduced power consumption.
Solution Approach 2:
The patent employs composite material structures including TiSiN (titanium silicide nitride) as the lower electrode material, combined with phase-change materials such as GeSbTe (gallium antimony telluride). This composite approach enables optimized electrical and thermal properties that facilitate efficient energy utilization for phase-change transformation while minimizing overall power consumption.
2Reliability
If high write current is used to achieve phase-change transformation, then crystalline to amorphous state change is achieved, but Joule heat generation becomes excessive
Solution Approach 1:
By modifying the resistivity parameter of the lower electrode to a specific range (1-30 mΩ·cm), the patent controls the Joule heat generation to be sufficient for phase-change transformation but not excessive. This parameter optimization ensures reliable transformation while preventing harmful overheating effects.
3Reliability
If conventional low-resistivity electrode materials are used, then electrical conductivity is high, but write current becomes too high causing excessive power consumption
Solution Approach 1:
The patent optimizes the electrical resistivity parameter of the lower electrode to a specific range (1-30 mΩ·cm), which is higher than conventional low-resistivity materials but still provides sufficient electrical conduction. This balanced parameter selection reduces write current to an optimal range (55-95 μA) while maintaining reliable electrical conduction for memory operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The optimized semiconductor device achieves a balanced write operation within a target electric energy range, minimizing Joule heat generation and maintaining efficient phase-change performance while reducing power consumption.
Implementation Method 1
a resistivity of the first lower electrode ranges from about 1 to about 30 mΩ·cm... optimize the write current between 55 μA and 95 μA, thereby reducing power consumption and ensuring effective phase-change operations... minimizing Joule heat generation
Implementation Method 2
a phase-change material that is heated upon application of write current and cooled down to transform to a crystalline state or an amorphous state
Data Source
AI summary
A semiconductor device includes a first word line, a first bit line, a mold film, and a first memory cell. The first bit line crosses a direction of the first word line and is spaced from the first word line. The mold film fills space between the first word line and the first bit line. The first memory cell is in the mold film and between the first word line and the first bit line. The first memory cell includes a first lower electrode on the first word line, a first phase-change film on the first lower electrode, a first intermediate electrode on the first phase-change film, a first ovonic threshold switch (OTS) on the first intermediate electrode, and a first upper electrode between the first OTS and the first bit line. A resistivity of the first lower electrode ranges from about 1 to about 30 mΩ·cm.