PRBS Generator with Adjustable Bit Width via Gearbox
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Solution Overview
Problem
Conventional parallel PRBS generators in integrated circuits have fixed bit widths, limiting their applicability to various applications and being inefficient as they require multiple instances of circuitry to support different bit widths, leading to idle and redundant components.
Innovation Solution
The implementation of a PRBS generation circuitry with a linear feedback shift register, multiple XOR trees, and control circuitry that includes multiplexing and gearbox modules to dynamically adjust the bit width, allowing the circuitry to output different numbers of parallel bits by selectively routing and converting data, thereby supporting multiple bit widths without the need for multiple instances of circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple instances of PRBS generator circuitry are used to support different bit widths, then adaptability to various applications is improved, but device complexity and die area increase due to redundant components
Solution Approach 1:
The PRBS generator is designed with control circuitry including multiplexing and gearbox modules that enable a single circuit instance to dynamically configure and support multiple bit widths (e.g., 10-bit, 16-bit, 32-bit, 64-bit). The multiplexing circuit selectively routes feedback bits based on the desired output width, while the gearbox circuit converts between different bit widths, allowing one universal circuit to replace multiple dedicated circuits for different applications.
Solution Approach 2:
The PRBS generator incorporates dynamic reconfiguration capability through control signals that adjust the operation mode of the multiplexing and gearbox circuits. The system can switch between different parallel output bit widths during operation based on application requirements, making the circuit adaptable rather than fixed. This dynamic adjustment is achieved through control logic that modifies the feedback path and data width conversion ratio without requiring physical reconfiguration.
2Ease of manufacture
If fixed width parallel output is used in parallel PRBS generators, then circuit design is simplified, but adaptability to various applications is reduced
Solution Approach 1:
The circuit incorporates universal control modules (multiplexing and gearbox circuits) that can be integrated with a single PRBS generator core to provide multiple output width capabilities. These control modules are designed with standardized interfaces and logic that work across different bit width configurations, maintaining design simplicity while extending functionality to support various applications requiring different parallel output widths.
3Productivity
If parallel PRBS generation is implemented to achieve higher data rates, then productivity is improved, but the requirement for fixed bit width reduces flexibility
Solution Approach 1:
The parallel PRBS generator maintains high data rates by utilizing multiple parallel output bits per clock cycle while incorporating dynamic bit width adjustment capability. The control circuitry allows the system to optimize the parallel output width based on application requirements, enabling flexible adaptation between 10-bit, 16-bit, 32-bit, or 64-bit parallel outputs while maintaining the high throughput advantage of parallel generation over serial generation.
Data Source
AI summary
Integrated circuits with pseudo random bit sequence (PRBS) generation circuitry are provided. The PRBS generation circuitry may be configured to support parallel output generation in multiple modes, where the parallel bit width in each mode can be different. The PRBS generation circuitry may include a linear feedback shift register that implements a desired polynomial, one or more XOR tree circuits that produces the parallel output bits, a multiplexer for selectively routing a subset of the parallel output bits back to the input of the shift register, and a gearbox for performing an adjustable bit width conversion. Configured in this way, the PRBS generation circuitry can provide parallel PRBS generation with an adjustable bit width.