Pseudorandom Binary Sequence Synchronization via Preliminary Action

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Solution Overview

Problem

Current methods for synchronizing pseudorandom binary sequence modules are inefficient and cost-intensive due to a brute-force approach in bit error rate measurements, leading to high computational loads.

Innovation Solution

A method that initializes the pseudorandom binary sequence module with a received bit sequence, compares remaining bits to determine if the bit error rate is below a predefined threshold, and synchronizes the modules if the error rate meets the threshold, while accounting for phase ambiguities and correcting errors by flipping bits or reversing bit sequences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a brute-force approach is used to check all positions of the binary sequence for synchronization, then synchronization can be achieved, but the computational load becomes very high making the measurement inefficient and cost-intensive

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidmeasurement efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by using a coarse synchronization stage before fine synchronization. The receiver first identifies a rough synchronization position using simplified criteria, then refines the synchronization in a second stage. This preliminaryç²— synchronization reduces the search space for the subsequent precise synchronization, avoiding the need to check all positions brute-force while ensuring reliable synchronization accuracy.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If all positions of the binary sequence are checked for synchronization, then complete synchronization verification is achieved, but the computational complexity and cost increase significantly

Engineering Contradiction:
Improvebit error rate measurement accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the synchronization process into multiple stages: a first coarse synchronization stage that quickly identifies a candidate position, and a second fine synchronization stage that performs precise verification. This segmentation divides the complex task of checking all positions into manageable parts, reducing computational complexity while maintaining measurement precision for bit error rate evaluation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by performing synchronization verification on a limited set of candidate positions identified in the first stage, rather than exhaustively checking all possible positions. The receiver tests only those positions that meet the coarse synchronization criteria, which significantly reduces computational complexity while still achieving sufficient measurement precision for practical applications.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10171127B2Method, system and computer program for synchronizing pseudorandom binary sequence modules
Publication Date: 2019.01.01 ROHDE & SCHWARZ GMBH & CO KG
  • US10171127B2 patent drawing
  • US10171127B2 patent drawing
  • US10171127B2 patent drawing

AI summary

A system comprises a receiver comprising a first pseudorandom binary sequence module, and a transmitter comprising a second pseudorandom binary sequence module. The first pseudorandom binary sequence module is initialized with a first received bit sequence to start bit sequence generation with the aid of the second pseudorandom binary sequence module. Further, received remaining bits are compared to bit sequences generated with the aid of the first pseudorandom binary sequence module to determine whether a bit error rate is below a predefined threshold.