Pre-Charging Circuit for Memory Data Detection

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Solution Overview

Problem

In miniaturized semiconductor memory circuits, signal cumulating effects lead to erroneous data reading and writing due to longer wiring lengths and fast operating speeds, causing logic value misinterpretation under small working voltage ranges.

Innovation Solution

A data detecting apparatus with a pre-charging circuit that includes a synchronization controller, delay circuit, and pre-charging pulse generator, which generates a pre-charging signal to charge memory cells and sense amplifiers within a predetermined period, preventing signal cumulating errors by resetting voltage levels during logic transitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the memory capacity is increased to store more data, then the storage capacity is improved, but the wiring lengths of data lines and bit lines become longer which causes signal cumulating effects

Engineering Contradiction:
Improvememory capacityVSAvoidsignal cumulating effect
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by introducing a pre-charging circuit that proactively charges the data lines and bit lines before signal transmission occurs. This pre-charging operation resets the voltage levels of the wiring to a known state, preventing signal cumulating effects from accumulating over longer wiring lengths, thereby enabling higher memory capacity without signal degradation

Inventive Principle:
Principle #10Preliminary action

2Speed

If the operating speed is increased to improve performance, then the processing speed is improved, but the signal cumulating effect becomes more serious causing erroneous data reading

Engineering Contradiction:
Improveoperating speedVSAvoiddata reading accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The pre-charging circuit performs preliminary charging of the data lines and bit lines before each signal transmission operation. This ensures that even at high operating speeds where signal cumulating effects occur more frequently, the wiring is reset to a known voltage state beforehand, maintaining data reading accuracy despite increased operating speed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the pre-charging circuit to continuously monitor and reset the voltage levels of the data lines and bit lines. The pre-charging operation is triggered based on the operational state of the memory circuit, providing feedback control to prevent signal cumulating effects from causing erroneous data reading at high speeds

Inventive Principle:
Principle #23Feedback

3Use of energy by moving object

If the working voltage range is reduced to match miniaturization requirements, then the power consumption is reduced, but the signal cumulating effect causes logic value misinterpretation

Engineering Contradiction:
Improvepower consumptionVSAvoidlogic value detection precision
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The pre-charging circuit performs preliminary charging of the data lines and bit lines to known voltage levels before signal transmission. This ensures that even within a reduced working voltage range where signal cumulating effects are more pronounced, the wiring starts from a controlled state, maintaining accurate logic value detection while operating at lower voltages to reduce power consumption

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The pre-charging technique effectively reduces data reading errors by maintaining stable voltage levels, preventing signal accumulation and ensuring accurate data conversion within the memory circuit.

Implementation Method 1

The pre-charging circuit sets a pre-determined period of time according to the first synchronization signal, generates a pre-charging signal within the pre-determined period of time, and charges the memory cells and the sense amplifiers via the data lines

Methodology Applied
Scientific EffectElectrical charging: Capacitance

Data Source

PatentUS7983102B2Data detecting apparatus and methods thereof
Publication Date: 2011.07.19 ETRON TECH INC
  • US7983102B2 patent drawing
  • US7983102B2 patent drawing
  • US7983102B2 patent drawing

AI summary

A data detecting apparatus and a data detecting method are disclosed in the embodiments of the present invention. The data detecting apparatus operates according to a clock signal with a predetermined period. The data detecting apparatus comprises a plurality of memory cells, a plurality of data lines, a plurality of bit lines, a plurality of sense amplifiers and a pre-charge control circuit.