Pre-DPD Power Detection Using DUC Delay for Faster Adjustment

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Solution Overview

Problem

Existing Digital Pre-Distortion (DPD) modules in Remote Radio units introduce significant delay and computation costs due to the need for power computation before data input, impacting system performance and efficiency.

Innovation Solution

The method involves moving power computation forward of the Up Conversion module, leveraging inherent delays of Digital Up Conversion (DUC) and Crest Factor Reduction (CFR) modules to reduce system delay and computation, by sampling carrier data and determining total power before DPD, allowing for power adjustment using a pre-configured search table.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If power computation is performed before DPD in existing DPD modules, then power detection accuracy is improved, but system delay increases and computation cost increases

Engineering Contradiction:
Improvepower detection accuracyVSAvoidsystem delay
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs power computation at an earlier stage in the signal processing chain, specifically before the Digital Up Conversion (DUC) and Crest Factor Reduction (CFR) modules, rather than after these modules as in conventional DPD implementations. This preliminary action allows the power detection results to be available earlier, reducing the overall system delay while maintaining accuracy through proper power tracking throughout the processing chain.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where power detection results are continuously monitored and used to adjust processing parameters in real-time. The system compares detected power levels with expected values and dynamically adjusts the processing gain and compensation factors to maintain accurate power measurement despite the early placement of the power computation module in the signal chain.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If power computation is performed before DPD in existing DPD modules, then power detection accuracy is improved, but computation cost increases

Engineering Contradiction:
Improvepower detection accuracyVSAvoidcomputation cost
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the power computation function from the conventional DPD processing chain and places it independently at an earlier stage. This separation allows for optimized computation using simplified algorithms that track power through the DUC and CFR modules without requiring the full complexity of conventional DPD power computation, thereby reducing overall computation cost while maintaining detection accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the computational parameters by using tracking-based power estimation methods rather than direct computation. Instead of computing power from raw samples through the entire processing chain, the system uses parameter tracking and propagation through the DUC and CFR modules, significantly reducing computational complexity while maintaining accurate power measurement.

Inventive Principle:
Principle #35Parameter changes

3Loss of time

If power computation is moved forward before DUC and CFR modules, then system delay is reduced, but power computation complexity increases

Engineering Contradiction:
Improvesystem delayVSAvoidpower computation complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent performs power computation at an earlier stage in the signal processing chain, specifically before the Digital Up Conversion (DUC) and Crest Factor Reduction (CFR) modules, rather than after these modules as in conventional DPD implementations. This preliminary action allows the power detection results to be available earlier, reducing the overall system delay while maintaining accuracy through proper power tracking throughout the processing chain.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the computational parameters by using tracking-based power estimation methods rather than direct computation. Instead of computing power from raw samples through the entire processing chain, the system uses parameter tracking and propagation through the DUC and CFR modules, significantly reducing computational complexity while maintaining accurate power measurement.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP2938138B1Power adjustment method and apparatus based on low delay power detection before dpd
Publication Date: 2019.07.24 ZTE CORP
  • EP2938138B1 patent drawingFigure 1~2
  • EP2938138B1 patent drawingFigure 3~4

AI summary

Disclosed are a power adjustment method and an apparatus based on low delay power detection before digital pre-distortion. The method comprises the following steps: according to pre-configured system carrier information, obtaining effective carrier information containing an effective carrier channel corresponding to each effective carrier; performing sampling on carrier data of each effective carrier channel according to the obtained effective carrier information, and then calculating combination power Pa of effective carriers before digital up conversion or digital peak clipping cancellation according to the sampling; and using the combination power Pa of the effective carriers to perform power adjustment before digital pre-distortion. The present invention moves power calculation ahead of an up conversion module, fully utilizes inherent delay of digital up conversion and a peak clipping module to offset time required for the power calculation, and effectively reduces system delay.