Pre-driver Negative Capacitance Circuit Parasitic Compensation
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Solution Overview
Problem
High-speed communication circuits face limitations in transmission speed due to parasitic capacitance from wiring and gate layout, which increases rising/falling times and narrows the frequency range, as existing solutions like inductor-coupled designs only cover a narrow frequency range.
Innovation Solution
A pre-driver and replica circuit utilizing a negative capacitance mechanism, comprising inverters, amplifiers, capacitors, and a rising time comparator, that compensates for parasitic capacitance by generating a negative capacitor, allowing for improved transmission and operation speed across a wide frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If inductor is coupled in parallel with parasitic capacitor to improve transmission speed, then rising/falling time is reduced, but frequency range coverage becomes narrow
Solution Approach 1:
The patent changes the fundamental parameter from inductance to negative capacitance. By using an amplifier with gain K≥1 coupled with a capacitor C to create a negative capacitance element (-KC), the circuit achieves broadband frequency compensation rather than narrowband resonance enhancement. This parameter transformation allows the compensation mechanism to work across a wide frequency range while maintaining fast rising/falling times.
Solution Approach 2:
The patent substitutes the traditional inductor-based resonant circuit with an active amplifier-capacitor system that generates negative capacitance. This replacement transforms a passive resonant system into an active broadband compensation system, eliminating the frequency range limitation inherent in inductor-based solutions.
2Speed
If parasitic capacitance is compensated to improve transmission speed, then rising/falling time is reduced, but circuit complexity increases
Solution Approach 1:
The amplifier serves multiple functions simultaneously: it provides signal amplification for the main signal path, generates the negative capacitance for parasitic compensation, and enables broadband operation. This multi-functionality reduces overall circuit complexity compared to using separate components for each function.
Solution Approach 2:
The patent merges the parasitic capacitance compensation function with the existing amplifier and capacitor components. By integrating the negative capacitance generation into the amplifier's operation rather than adding a separate compensation circuit, the overall circuit complexity is minimized while achieving the desired speed improvement.
3Speed
If negative capacitance mechanism is used to cancel parasitic capacitance, then transmission speed is enhanced, but sensitivity to PVT variations increases
Solution Approach 1:
The patent implements a feedback mechanism where the amplifier continuously adjusts its operation to maintain the negative capacitance effect. The feedback loop compensates for variations in process, voltage, and temperature by dynamically adjusting the amplifier's gain and operating point, thereby maintaining stable compensation performance across PVT variations.
Solution Approach 2:
The amplifier-capacitor system is self-adjusting and automatically compensates for PVT variations without requiring external calibration or adjustment. The negative capacitance mechanism inherently adapts to changing conditions through the amplifier's feedback control, making the circuit self-service in maintaining optimal performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively cancels parasitic capacitance, enhancing transmission and operation speed while maintaining insensitivity to Process, Voltage, and Temperature (PVT) variations through self-calibration, thus improving circuit performance.
Implementation Method 1
an amplifier, amplifying the input signal by a gain factor so as to generate an amplified signal and an inverted amplified signal
Implementation Method 2
a first capacitor, wherein the first capacitor has a first terminal coupled to the output node, and a second terminal for receiving the amplified signal; and a second capacitor, wherein the second capacitor has a first terminal coupled to the first node, and a second terminal for receiving the inverted amplified signal
Data Source
AI summary
A pre-driver includes a first inverter, a second inverter, an amplifier, a first capacitor, and a second capacitor. The first inverter has an input terminal for receiving an input signal at an input node, and an output terminal coupled to an inner node. The second inverter has an input terminal coupled to the inner node, and an output terminal for outputting an output signal at an output node. The amplifier is configured to amplify the input signal by a gain factor so as to generate an amplified signal and an inverted amplified signal. The first capacitor has a first terminal coupled to the output node, and a second terminal for receiving the amplified signal. The second capacitor has a first terminal coupled to the inner node, and a second terminal for receiving the inverted amplified signal.