Pre-Encapsulation Through Vias in Semiconductor Packaging

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Solution Overview

Problem

Traditional semiconductor device packaging processes face complexities and high costs due to post-encapsulation through via formation, which introduces manufacturing and reliability challenges, and lacks efficient methods for pre-fabricating through vias using photolithographic processes.

Innovation Solution

The method involves forming signal conduits through photolithography and metal deposition on a printed circuit substrate before encapsulation, allowing these conduits to serve as through vias, enabling signal-bearing pathways between package connections and semiconductor die contacts, and incorporating them into the package using wire bonding or flip chip couplings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through package vias are made after encapsulation using drilling and filling/metallization process, then electrical contacts between bottom side and top side interconnect structures can be provided, but the manufacturing process complexity increases and reliability challenges arise

Engineering Contradiction:
Improvethrough via integrity and connection reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming signal conduits through the substrate before encapsulation, rather than after. The conduits are created using photolithography and metal deposition, then embedded into the substrate during the encapsulation process. This preliminary formation eliminates the need for post-encapsulation drilling and filling operations, thereby reducing manufacturing complexity while maintaining via integrity and connection reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If through package vias are made after encapsulation, then electrical contacts can be established, but costs associated with materials, processes and additional tooling increase

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The signal conduits are formed in advance using standard photolithography and metal deposition techniques before encapsulation. This preliminary action allows the conduits to be integrated into the substrate during normal manufacturing flows, eliminating the need for expensive post-encapsulation tooling and specialized drilling/filling equipment, thereby reducing overall manufacturing costs while ensuring connection reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical drilling and filling system with a photolithographic patterning and metal deposition system. Instead of using mechanical drills to create holes and then filling them with conductive material, the signal conduits are formed through planar photolithography processes followed by metal deposition, which are more cost-effective and better integrated with standard semiconductor manufacturing equipment.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If pre-fabricated through vias are incorporated to printed circuit substrate, then package-on-package connectivity is enhanced, but additional process steps are required

Engineering Contradiction:
Improvepackage-on-package connectivityVSAvoidprocess steps
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the formation of signal conduits with the substrate fabrication process itself. The photolithography and metal deposition steps that create the conduits are integrated into the same process flow used for creating other substrate features. This merging eliminates the need for separate, additional process steps while enabling enhanced package-on-package connectivity through the pre-fabricated conduits.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the manufacturing process, reduces costs, and ensures consistent quality signal paths by embedding and exposing signal conduits during encapsulation, eliminating the need for post-encapsulation drilling and filling steps, and facilitating enhanced package-on-package connectivity.

Implementation Method 1

forming signal conduits through photolithography and metal deposition on a printed circuit substrate

Methodology Applied
Scientific EffectPhotolithography: Photography

Implementation Method 2

forming signal conduits through photolithography and metal deposition on a printed circuit substrate

Methodology Applied
Scientific EffectMetal deposition: Physical Vapour Deposition

Data Source

PatentUS8597983B2Semiconductor device packaging having substrate with pre-encapsulation through via formation
Publication Date: 2013.12.03 NXP USA INC
  • US8597983B2 patent drawing
  • US8597983B2 patent drawing
  • US8597983B2 patent drawing

AI summary

A method for forming through vias in a semiconductor device package prior to package encapsulation is provided. One or more signal conduits are formed through photolithography and metal deposition on a printed circuit substrate having interconnect pads. After removing photoresistive material, the semiconductor device package is built by encapsulating the signal conduits along with any semiconductor die, wire bonding, and other parts of the package. Free ends of each signal conduit are exposed and the signal conduits are used as through vias to provide signal-bearing pathways between connections from a top-mounted package to a printed circuit substrate interconnect and electrical contacts of the semiconductor die or package contacts. Using this method, signal conduits can be provided in a variety of geometric placings on the printed circuit substrate for inclusion in a semiconductor device package. A semiconductor device package incorporating the pre-fabricated through vias is also provided.