Pre-encapsulation Through Via Formation Using Drop-in Signal Conduits

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Solution Overview

Problem

Traditional semiconductor device packaging processes face complexities and reliability challenges due to post-encapsulation through via formation, which introduces manufacturing difficulties and high costs, and lacks flexibility in via configurations.

Innovation Solution

The process involves embedding pre-formed signal conduits, such as conductive pillars or optical waveguides, in a holder within the encapsulated semiconductor device package, allowing for exposure as through vias before encapsulation, enabling flexible configurations and reducing manufacturing complexities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If post-encapsulation via drilling and filling is used, then through vias can be formed after encapsulation, but manufacturing complexity and costs increase significantly

Engineering Contradiction:
Improvevia integrityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the through vias in the encapsulant before the encapsulation process. Pre-formed through via structures are prepared in advance and then embedded into the encapsulant during molding, eliminating the need for complex post-encapsulation drilling and filling operations. This resolves the contradiction by maintaining via integrity while dramatically reducing manufacturing process complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the traditional sequence by forming vias before encapsulation rather than after. Instead of drilling through the encapsulant post-molding, the approach creates through via structures beforehand and incorporates them during the encapsulation process. This inversion eliminates the need for subsequent via formation steps, reducing manufacturing complexity while ensuring consistent via quality.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If post-encapsulation via formation is used, then through vias can be created, but manufacturing costs and tooling requirements increase

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By preparing through via structures in advance and embedding them during encapsulation, the patent eliminates the need for expensive post-encapsulation drilling equipment and metallization tooling. The pre-formed vias are integrated into the encapsulation process using standard molding tools, significantly reducing capital equipment costs and manufacturing expenses while maintaining connection reliability.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If traditional post-encapsulation via formation is used, then through vias can be made, but flexibility in via configuration is limited

Engineering Contradiction:
Improvevia consistencyVSAvoidvia configuration flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The pre-formed through via structures can be designed and positioned with high precision before encapsulation, allowing flexible configuration patterns to be established in advance. This approach enables complex via arrangements to be implemented using standard molding processes, providing both configuration flexibility and via consistency without the limitations of post-encapsulation drilling.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9142502B2Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits
Publication Date: 2015.09.22 NXP USA INC
  • US9142502B2 patent drawing
  • US9142502B2 patent drawing
  • US9142502B2 patent drawing

AI summary

A semiconductor device package having pre-formed and placed through vias and a process for making such a package is provided. One or more signal conduits are placed in a holder that is subsequently embedded in an encapsulated semiconductor device package. The ends of the signal conduits are exposed and the signal conduits are then used as through package vias, providing signal-bearing pathways between interconnects or contacts on the bottom and top of the package. Holders can be provided in a variety of geometries and materials, depending upon the nature of the application. Further, multiple holders with signal conduits can be provided in a single package to provide for more complex interconnect configuration demands in, for example, system-in-a-package applications.