Pre-silicon Chip Model Validation Using Extracted Instruction Traces
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Solution Overview
Problem
Conventional pre-silicon validation of processor cores requires extensive time and resources, as it necessitates modeling the complete system, which can be impractical when the operating system for the new processor is not available, and running it on a chip model misrepresents the actual performance.
Innovation Solution
A system that extracts instruction traces from a legacy processor using core dump data and executes them in a pre-silicon chip model simulator without an operating system environment, allowing for performance analysis and validation of new processor versions or next-generation processor cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the complete system is modeled for pre-silicon validation, then validation thoroughness is improved, but device complexity and verification time increase
Solution Approach 1:
The patent extracts only the necessary instruction traces from a legacy processor's core dump data, separating the essential validation information from the complete system. This allows validation to be performed on a simplified processor model without requiring the entire system including operating system to be modeled, thereby reducing complexity while maintaining validation effectiveness
Solution Approach 2:
The validation process is segmented into distinct components: extracting instruction traces from core dump data, simulating these traces independently, and validating the processor model. This segmentation allows the validation to focus on critical processor behaviors without requiring complete system modeling, reducing overall complexity
2Reliability
If the operating system environment is used for pre-silicon validation, then functional correctness is improved, but verification time and resources increase
Solution Approach 1:
The patent applies partial action by using only the necessary portion of the system (instruction traces from core dump) rather than the complete operating system environment. This partial approach provides sufficient functional correctness for pre-silicon validation without the excessive time and resource requirements of full OS-based validation
Solution Approach 2:
Instead of running the actual operating system on the pre-silicon processor model, the patent creates a simplified copy of the execution environment by extracting and simulating instruction traces. This copy provides adequate functional testing while dramatically reducing verification time and resource requirements
3Loss of time
If instruction traces are extracted and simulated without OS environment, then verification time is reduced, but measurement precision may be affected
Solution Approach 1:
The patent introduces an intermediary approach by using instruction traces as a bridge between the legacy processor behavior and the pre-silicon processor model validation. These traces capture essential execution patterns without requiring the full OS environment, maintaining measurement precision for critical processor functions while reducing verification time
Solution Approach 2:
The patent changes the validation parameters from complete system-level metrics to instruction-level trace metrics. This parameter change allows for efficient simulation and validation of processor behavior while maintaining sufficient precision for pre-silicon verification, focusing on the most critical performance indicators
Data Source
AI summary
A system is provided to validate a computer processor. The system includes a computing system configured to obtain core dump data including executable instructions corresponding to a code stored in a legacy processor. An instruction-level simulator is installed in the computing system and is configured to simulate the executable instructions to generate a plurality of instruction traces. The system further includes a pre-silicon chip model simulator configured to execute the instruction traces to generate performance data. The computer processor is verified based at least in part on the performance data.