Pre-Wafer Laser Dicing With Internal Cracks to Prevent Splash Damage
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Solution Overview
Problem
The existing semiconductor wafer singulation process using lasers often results in 'splash damage' to integrated circuits due to unintended laser light reflection and scattering, significantly reducing manufacturing yield.
Innovation Solution
A method that forms a horizontal array of cracks in the semiconductor wafer interior using a laser before circuitry formation, ensuring the cracks do not extend to the device side, followed by forming circuitry and conductive bumps on the device side, which are free from laser damage, and covering the semiconductor die with a mold compound.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If laser is used for wafer singulation, then cutting efficiency is improved, but laser light reflection and scattering causes splash damage to integrated circuits
Solution Approach 1:
The patent applies preliminary action by forming cracks in the wafer interior before forming the integrated circuits. The laser creates a horizontal array of cracks at a controlled depth that stops before reaching the device side where circuits will be formed. This preliminary crack formation prevents subsequent laser singulation damage to the circuits while maintaining cutting efficiency.
Solution Approach 2:
The patent introduces a depth dimension control mechanism by forming cracks at a specific intermediate depth within the wafer. The cracks extend from the first surface toward the second surface but stop at a controlled distance before reaching it, creating a three-dimensional crack structure that prevents laser light from reaching and damaging the circuits on the device side.
2Manufacturing precision
If multiple laser passes are used to form vertical cracks, then cutting precision is improved, but manufacturing time increases
Solution Approach 1:
The patent performs preliminary crack formation at an intermediate depth before final singulation. This preliminary horizontal array of cracks serves as a guide structure that enables more efficient and precise subsequent singulation operations, reducing the need for multiple corrective laser passes and thereby decreasing total manufacturing time.
3Reliability
If wider saw streets are used to prevent laser damage, then circuitry safety is improved, but wafer area utilization decreases
Solution Approach 1:
The patent forms a preliminary horizontal array of cracks that act as a protective barrier and light-trapping structure. This allows the use of narrower saw streets because the preliminary cracks prevent laser light from reflecting and splashing onto the circuitry, thereby maintaining circuit safety while maximizing wafer area utilization.
Solution Approach 2:
The patent converts the potentially harmful laser light reflection into a beneficial effect by using the preliminary cracks to trap and absorb laser energy. The cracks serve as light sinks that prevent harmful reflections, allowing narrower saw streets to be used safely while improving overall wafer utilization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents laser-induced damage to the circuitry, enhancing manufacturing yield by controlling the depth and alignment of cracks and allowing for narrower saw streets, thus reducing the risk of circuitry damage during the singulation process.
Implementation Method 1
forming a horizontal array of cracks in an interior of the wafer using a laser
Data Source
AI summary
In examples, a method for manufacturing a semiconductor die comprises, prior to forming circuitry on a semiconductor wafer, forming a horizontal array of cracks in an interior of the wafer using a laser. The method also includes, after forming the horizontal array of cracks, forming circuitry on a device side of the wafer. The method includes forming conductive bumps on the device side of the wafer.