Pre-aged Flash Memory for Fast NVDIMM Data Backup

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Solution Overview

Problem

Current non-volatile memory systems, such as NVDIMM, face challenges in achieving fast programming times for data backup during power failures, as existing flash memory chips require excessive time to write data, necessitating multiple chips in parallel, which increases cost and complexity.

Innovation Solution

The implementation of a memory system that pre-ages NAND flash memory devices by executing dummy program/erase cycles before use, reducing programming times by optimizing the number of flash memory chips needed and improving performance without significantly affecting the device's lifespan.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple flash memory chips are used in parallel to reduce programming time, then the backup speed is improved, but the device complexity and cost increase

Engineering Contradiction:

Improveprogramming speedVSAvoidnumber of flash memory chips

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-aging the flash memory chips through dummy program/erase cycles before they are deployed in the NVDIMM system. This pre-conditioning of the flash memory cells reduces their programming time when actual data backup operations occur, eliminating the need for multiple parallel chips and reducing system complexity

Inventive Principle:

Principle #10Preliminary action

2Speed

If multiple flash memory chips are used in parallel to reduce programming time, then the backup speed is improved, but the system cost increases

Engineering Contradiction:

Improveprogramming speedVSAvoidsystem cost

Core Design Contradiction:

SpeedVSEase of manufacture

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

3Speed

If pre-aging cycles are executed to reduce programming time, then the programming speed is improved, but the device lifespan may be affected

Engineering Contradiction:

Improveprogramming speedVSAvoiddevice lifespan

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent applies partial action by executing a limited number of pre-aging cycles (specifically 100 cycles) before deploying the flash memory in the NVDIMM system. This partial pre-aging is sufficient to reduce programming time significantly while minimizing the impact on the overall device lifespan, balancing performance improvement with reliability preservation

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS9747200B1Memory system with high speed non-volatile memory backup using pre-aged flash memory devices

Publication Date: 2017.08.29 IP GEM GRP LLC

AI summary

A memory system having non-volatile memory backup with high-speed programming capability. The non-volatile memory, such as flash memory, is pre-aged before first use in a host system. Pre-aging includes execution of a plurality of dummy program and erase cycles as part of the memory system or before assembly as part of the memory system. The memory system can include an NVDIMM having flash memory backup. The pre-aged flash memory programs a page of data in a shorter period of time relative to new flash memory. Fewer flash memory chips are needed in the memory system relative to memory systems using new flash memory chips, thereby reducing cost of the memory system. The NVDIMM may be used to backup data from a volatile memory device such as a DRAM. Programming times may be tracked after each dummy program/erase cycle, and for each programmable page of a memory block.